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[AArch64][GISel] Add fp128 and i128 sitofp/uitofp handling (#97691)
Legalize sitofp/uitofp involving fp128/i128 types into a libcall. Vector with i128/fp128 types are scalarized.
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4 files changed

+1519
-992
lines changed

4 files changed

+1519
-992
lines changed

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1154,16 +1154,13 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
11541154
}
11551155
case TargetOpcode::G_SITOFP:
11561156
case TargetOpcode::G_UITOFP: {
1157-
// FIXME: Support other types
11581157
unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();
1159-
unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
1160-
if ((FromSize != 32 && FromSize != 64) || (ToSize != 32 && ToSize != 64))
1158+
Type *ToTy =
1159+
getFloatTypeForLLT(Ctx, MRI.getType(MI.getOperand(0).getReg()));
1160+
if ((FromSize != 32 && FromSize != 64 && FromSize != 128) || !ToTy)
11611161
return UnableToLegalize;
11621162
LegalizeResult Status = conversionLibcall(
1163-
MI, MIRBuilder,
1164-
ToSize == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx),
1165-
FromSize == 32 ? Type::getInt32Ty(Ctx) : Type::getInt64Ty(Ctx),
1166-
LocObserver);
1163+
MI, MIRBuilder, ToTy, Type::getIntNTy(Ctx, FromSize), LocObserver);
11671164
if (Status != Legalized)
11681165
return Status;
11691166
break;

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

Lines changed: 26 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -711,34 +711,49 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
711711
{{s32, s128}, {s64, s128}, {s128, s128}, {s128, s32}, {s128, s64}});
712712

713713
getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
714-
.legalForCartesianProduct({s32, s64, v2s64, v4s32, v2s32})
714+
.legalFor({{s32, s32},
715+
{s64, s32},
716+
{s32, s64},
717+
{s64, s64},
718+
{v2s64, v2s64},
719+
{v4s32, v4s32},
720+
{v2s32, v2s32}})
715721
.legalIf([=](const LegalityQuery &Query) {
716722
return HasFP16 &&
717723
(Query.Types[0] == s16 || Query.Types[0] == v4s16 ||
718724
Query.Types[0] == v8s16) &&
719725
(Query.Types[1] == s32 || Query.Types[1] == s64 ||
720726
Query.Types[1] == v4s16 || Query.Types[1] == v8s16);
721727
})
722-
.widenScalarToNextPow2(1)
723-
.clampScalar(1, s32, s64)
724-
.widenScalarToNextPow2(0)
725-
.clampScalarOrElt(0, MinFPScalar, s64)
726-
.moreElementsToNextPow2(0)
728+
.scalarizeIf(scalarOrEltWiderThan(1, 64), 1)
729+
.scalarizeIf(scalarOrEltWiderThan(0, 64), 0)
730+
.moreElementsToNextPow2(1)
731+
.widenScalarOrEltToNextPow2OrMinSize(1)
732+
.minScalar(1, s32)
733+
.widenScalarOrEltToNextPow2OrMinSize(0, /*MinSize=*/HasFP16 ? 16 : 32)
727734
.widenScalarIf(
728735
[=](const LegalityQuery &Query) {
729-
return Query.Types[0].getScalarSizeInBits() <
730-
Query.Types[1].getScalarSizeInBits();
736+
return Query.Types[1].getScalarSizeInBits() <= 64 &&
737+
Query.Types[0].getScalarSizeInBits() <
738+
Query.Types[1].getScalarSizeInBits();
731739
},
732740
LegalizeMutations::changeElementSizeTo(0, 1))
733741
.widenScalarIf(
734742
[=](const LegalityQuery &Query) {
735-
return Query.Types[0].getScalarSizeInBits() >
736-
Query.Types[1].getScalarSizeInBits();
743+
return Query.Types[0].getScalarSizeInBits() <= 64 &&
744+
Query.Types[0].getScalarSizeInBits() >
745+
Query.Types[1].getScalarSizeInBits();
737746
},
738747
LegalizeMutations::changeElementSizeTo(1, 0))
739748
.clampNumElements(0, v4s16, v8s16)
740749
.clampNumElements(0, v2s32, v4s32)
741-
.clampMaxNumElements(0, s64, 2);
750+
.clampMaxNumElements(0, s64, 2)
751+
.libcallFor({{s16, s128},
752+
{s32, s128},
753+
{s64, s128},
754+
{s128, s128},
755+
{s128, s32},
756+
{s128, s64}});
742757

743758
// Control-flow
744759
getActionDefinitionsBuilder(G_BRCOND)

llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir

Lines changed: 0 additions & 76 deletions
Original file line numberDiff line numberDiff line change
@@ -635,79 +635,3 @@ body: |
635635
%1(s64) = G_FPTOUI %0
636636
$x0 = COPY %1(s64)
637637
...
638-
639-
---
640-
name: sitofp_v2s64_v2s32
641-
legalized: true
642-
regBankSelected: true
643-
644-
body: |
645-
bb.0:
646-
liveins: $d0
647-
648-
; CHECK-LABEL: name: sitofp_v2s64_v2s32
649-
; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
650-
; CHECK: [[SSHLLv2i32_shift:%[0-9]+]]:fpr128 = SSHLLv2i32_shift [[COPY]], 0
651-
; CHECK: [[SCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept SCVTFv2f64 [[SSHLLv2i32_shift]]
652-
; CHECK: $q0 = COPY [[SCVTFv2f64_]]
653-
%0:fpr(<2 x s32>) = COPY $d0
654-
%1:fpr(<2 x s64>) = G_SITOFP %0
655-
$q0 = COPY %1(<2 x s64>)
656-
...
657-
658-
---
659-
name: uitofp_v2s64_v2s32
660-
legalized: true
661-
regBankSelected: true
662-
663-
body: |
664-
bb.0:
665-
liveins: $d0
666-
667-
; CHECK-LABEL: name: uitofp_v2s64_v2s32
668-
; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
669-
; CHECK: [[USHLLv2i32_shift:%[0-9]+]]:fpr128 = USHLLv2i32_shift [[COPY]], 0
670-
; CHECK: [[UCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept UCVTFv2f64 [[USHLLv2i32_shift]]
671-
; CHECK: $q0 = COPY [[UCVTFv2f64_]]
672-
%0:fpr(<2 x s32>) = COPY $d0
673-
%1:fpr(<2 x s64>) = G_UITOFP %0
674-
$q0 = COPY %1(<2 x s64>)
675-
...
676-
677-
---
678-
name: sitofp_v2s32_v2s64
679-
legalized: true
680-
regBankSelected: true
681-
682-
body: |
683-
bb.0:
684-
liveins: $q0
685-
686-
; CHECK-LABEL: name: sitofp_v2s32_v2s64
687-
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
688-
; CHECK: [[SCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept SCVTFv2f64 [[COPY]]
689-
; CHECK: [[FCVTNv2i32_:%[0-9]+]]:fpr64 = nofpexcept FCVTNv2i32 [[SCVTFv2f64_]]
690-
; CHECK: $d0 = COPY [[FCVTNv2i32_]]
691-
%0:fpr(<2 x s64>) = COPY $q0
692-
%1:fpr(<2 x s32>) = G_SITOFP %0
693-
$d0 = COPY %1(<2 x s32>)
694-
...
695-
696-
---
697-
name: uitofp_v2s32_v2s64
698-
legalized: true
699-
regBankSelected: true
700-
701-
body: |
702-
bb.0:
703-
liveins: $q0
704-
705-
; CHECK-LABEL: name: uitofp_v2s32_v2s64
706-
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
707-
; CHECK: [[UCVTFv2f64_:%[0-9]+]]:fpr128 = nofpexcept UCVTFv2f64 [[COPY]]
708-
; CHECK: [[FCVTNv2i32_:%[0-9]+]]:fpr64 = nofpexcept FCVTNv2i32 [[UCVTFv2f64_]]
709-
; CHECK: $d0 = COPY [[FCVTNv2i32_]]
710-
%0:fpr(<2 x s64>) = COPY $q0
711-
%1:fpr(<2 x s32>) = G_UITOFP %0
712-
$d0 = COPY %1(<2 x s32>)
713-
...

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