Skip to content

Commit 3b5f9c6

Browse files
davemgreendavemgreen
committed
[AArch64] Add test cases for IsUndefDeInterleave. NFC
1 parent 7a213e7 commit 3b5f9c6

File tree

1 file changed

+142
-0
lines changed

1 file changed

+142
-0
lines changed

‎llvm/test/CodeGen/AArch64/zext-shuffle.ll

Lines changed: 142 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -543,3 +543,145 @@ define <8 x double> @uitofp_load_fadd(ptr %p) {
543543
ret <8 x double> %c
544544
}
545545

546+
define <4 x i32> @isUndefDeInterleave_b0(<8 x i16> %a, <8 x i16> %b) {
547+
; CHECK-LABEL: isUndefDeInterleave_b0:
548+
; CHECK: // %bb.0:
549+
; CHECK-NEXT: movi v1.2d, #0x00ffff0000ffff
550+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
551+
; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
552+
; CHECK-NEXT: ret
553+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 0, i32 4, i32 poison, i32 poison, i32 poison, i32 poison>
554+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
555+
%3 = zext <4 x i16> %s2 to <4 x i32>
556+
ret <4 x i32> %3
557+
}
558+
559+
define <4 x i32> @isUndefDeInterleave_b1(<8 x i16> %a) {
560+
; CHECK-LABEL: isUndefDeInterleave_b1:
561+
; CHECK: // %bb.0:
562+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
563+
; CHECK-NEXT: ushr v0.4s, v0.4s, #16
564+
; CHECK-NEXT: ret
565+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 1, i32 5, i32 poison, i32 poison, i32 poison, i32 poison>
566+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
567+
%3 = zext <4 x i16> %s2 to <4 x i32>
568+
ret <4 x i32> %3
569+
}
570+
571+
define <4 x i32> @isUndefDeInterleave_b2(<8 x i16> %a) {
572+
; CHECK-LABEL: isUndefDeInterleave_b2:
573+
; CHECK: // %bb.0:
574+
; CHECK-NEXT: movi v1.2d, #0x00ffff0000ffff
575+
; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
576+
; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
577+
; CHECK-NEXT: ret
578+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 2, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>
579+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
580+
%3 = zext <4 x i16> %s2 to <4 x i32>
581+
ret <4 x i32> %3
582+
}
583+
584+
define <4 x i32> @isUndefDeInterleave_b3(<8 x i16> %a) {
585+
; CHECK-LABEL: isUndefDeInterleave_b3:
586+
; CHECK: // %bb.0:
587+
; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
588+
; CHECK-NEXT: ushr v0.4s, v0.4s, #16
589+
; CHECK-NEXT: ret
590+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 3, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
591+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
592+
%3 = zext <4 x i16> %s2 to <4 x i32>
593+
ret <4 x i32> %3
594+
}
595+
596+
define <4 x i32> @isUndefDeInterleave_t0(<8 x i16> %a, <8 x i16> %b) {
597+
; CHECK-LABEL: isUndefDeInterleave_t0:
598+
; CHECK: // %bb.0:
599+
; CHECK-NEXT: movi v1.2d, #0x00ffff0000ffff
600+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
601+
; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
602+
; CHECK-NEXT: ret
603+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 4>
604+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
605+
%3 = zext <4 x i16> %s2 to <4 x i32>
606+
ret <4 x i32> %3
607+
}
608+
609+
define <4 x i32> @isUndefDeInterleave_t1(<8 x i16> %a) {
610+
; CHECK-LABEL: isUndefDeInterleave_t1:
611+
; CHECK: // %bb.0:
612+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
613+
; CHECK-NEXT: ushr v0.4s, v0.4s, #16
614+
; CHECK-NEXT: ret
615+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 5>
616+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
617+
%3 = zext <4 x i16> %s2 to <4 x i32>
618+
ret <4 x i32> %3
619+
}
620+
621+
define <4 x i32> @isUndefDeInterleave_t2(<8 x i16> %a) {
622+
; CHECK-LABEL: isUndefDeInterleave_t2:
623+
; CHECK: // %bb.0:
624+
; CHECK-NEXT: movi v1.2d, #0x00ffff0000ffff
625+
; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
626+
; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
627+
; CHECK-NEXT: ret
628+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 2, i32 6>
629+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
630+
%3 = zext <4 x i16> %s2 to <4 x i32>
631+
ret <4 x i32> %3
632+
}
633+
634+
define <4 x i32> @isUndefDeInterleave_t3(<8 x i16> %a) {
635+
; CHECK-LABEL: isUndefDeInterleave_t3:
636+
; CHECK: // %bb.0:
637+
; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
638+
; CHECK-NEXT: ushr v0.4s, v0.4s, #16
639+
; CHECK-NEXT: ret
640+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 3, i32 7>
641+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
642+
%3 = zext <4 x i16> %s2 to <4 x i32>
643+
ret <4 x i32> %3
644+
}
645+
646+
define <4 x i32> @isUndefDeInterleave_b0_bad(<8 x i16> %a, <8 x i16> %b) {
647+
; CHECK-LABEL: isUndefDeInterleave_b0_bad:
648+
; CHECK: // %bb.0:
649+
; CHECK-NEXT: movi v1.2d, #0x00ffff0000ffff
650+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
651+
; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
652+
; CHECK-NEXT: ret
653+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 4, i32 4, i32 0, i32 4, i32 poison, i32 poison, i32 poison, i32 poison>
654+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
655+
%3 = zext <4 x i16> %s2 to <4 x i32>
656+
ret <4 x i32> %3
657+
}
658+
659+
define <4 x i32> @isUndefDeInterleave_t1_bad(<8 x i16> %a) {
660+
; CHECK-LABEL: isUndefDeInterleave_t1_bad:
661+
; CHECK: // %bb.0:
662+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
663+
; CHECK-NEXT: ushr v0.4s, v0.4s, #16
664+
; CHECK-NEXT: ret
665+
%2 = shufflevector <8 x i16> %a, <8 x i16> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 4, i32 4, i32 1, i32 5>
666+
%s2 = shufflevector <8 x i16> %2, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
667+
%3 = zext <4 x i16> %s2 to <4 x i32>
668+
ret <4 x i32> %3
669+
}
670+
671+
define i16 @undeftop(<8 x i16> %0) {
672+
; CHECK-LABEL: undeftop:
673+
; CHECK: // %bb.0:
674+
; CHECK-NEXT: movi v1.2d, #0x00ffff0000ffff
675+
; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
676+
; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
677+
; CHECK-NEXT: add v0.4s, v0.4s, v0.4s
678+
; CHECK-NEXT: xtn v0.4h, v0.4s
679+
; CHECK-NEXT: umov w0, v0.h[0]
680+
; CHECK-NEXT: ret
681+
%2 = shufflevector <8 x i16> %0, <8 x i16> zeroinitializer, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 9, i32 7, i32 5, i32 3>
682+
%3 = zext <8 x i16> %2 to <8 x i64>
683+
%new0 = add <8 x i64> %3, %3
684+
%last = trunc <8 x i64> %new0 to <8 x i16>
685+
%4 = extractelement <8 x i16> %last, i32 0
686+
ret i16 %4
687+
}

0 commit comments

Comments
 (0)