@@ -24,130 +24,66 @@ define <1 x i64> @v1i64(<1 x i64> %a) {
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}
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define <2 x i64 > @v2i64 (<2 x i64 > %a ) {
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- ; CHECK-SD-LABEL: v2i64:
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- ; CHECK-SD: // %bb.0:
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- ; CHECK-SD-NEXT: cmlt v0.4s, v0.4s, #0
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- ; CHECK-SD-NEXT: ret
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- ;
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- ; CHECK-GI-LABEL: v2i64:
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- ; CHECK-GI: // %bb.0:
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- ; CHECK-GI-NEXT: movi v1.4s, #1
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- ; CHECK-GI-NEXT: ushr v0.2d, v0.2d, #31
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- ; CHECK-GI-NEXT: movi v2.2d, #0x000000ffffffff
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- ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
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- ; CHECK-GI-NEXT: fmov x11, d2
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- ; CHECK-GI-NEXT: mov x9, v2.d[1]
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- ; CHECK-GI-NEXT: fmov x10, d0
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- ; CHECK-GI-NEXT: mov x8, v0.d[1]
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- ; CHECK-GI-NEXT: mul x10, x10, x11
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- ; CHECK-GI-NEXT: mul x8, x8, x9
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- ; CHECK-GI-NEXT: fmov d0, x10
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- ; CHECK-GI-NEXT: mov v0.d[1], x8
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- ; CHECK-GI-NEXT: ret
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+ ; CHECK-LABEL: v2i64:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: cmlt v0.4s, v0.4s, #0
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+ ; CHECK-NEXT: ret
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%b = lshr <2 x i64 > %a , <i64 31 , i64 31 >
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%c = and <2 x i64 > %b , <i64 4294967297 , i64 4294967297 >
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%d = mul nuw <2 x i64 > %c , <i64 4294967295 , i64 4294967295 >
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ret <2 x i64 > %d
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}
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define <2 x i32 > @v2i32 (<2 x i32 > %a ) {
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- ; CHECK-SD-LABEL: v2i32:
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- ; CHECK-SD: // %bb.0:
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- ; CHECK-SD-NEXT: cmlt v0.4h, v0.4h, #0
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- ; CHECK-SD-NEXT: ret
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- ;
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- ; CHECK-GI-LABEL: v2i32:
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- ; CHECK-GI: // %bb.0:
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- ; CHECK-GI-NEXT: movi v1.4h, #1
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- ; CHECK-GI-NEXT: ushr v0.2s, v0.2s, #15
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- ; CHECK-GI-NEXT: movi d2, #0x00ffff0000ffff
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- ; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
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- ; CHECK-GI-NEXT: mul v0.2s, v0.2s, v2.2s
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- ; CHECK-GI-NEXT: ret
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+ ; CHECK-LABEL: v2i32:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: cmlt v0.4h, v0.4h, #0
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+ ; CHECK-NEXT: ret
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%b = lshr <2 x i32 > %a , <i32 15 , i32 15 >
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%c = and <2 x i32 > %b , <i32 65537 , i32 65537 >
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%d = mul nuw <2 x i32 > %c , <i32 65535 , i32 65535 >
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ret <2 x i32 > %d
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}
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define <4 x i32 > @v4i32 (<4 x i32 > %a ) {
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- ; CHECK-SD-LABEL: v4i32:
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- ; CHECK-SD: // %bb.0:
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- ; CHECK-SD-NEXT: cmlt v0.8h, v0.8h, #0
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- ; CHECK-SD-NEXT: ret
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- ;
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- ; CHECK-GI-LABEL: v4i32:
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- ; CHECK-GI: // %bb.0:
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- ; CHECK-GI-NEXT: movi v1.8h, #1
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- ; CHECK-GI-NEXT: ushr v0.4s, v0.4s, #15
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- ; CHECK-GI-NEXT: movi v2.2d, #0x00ffff0000ffff
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- ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
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- ; CHECK-GI-NEXT: mul v0.4s, v0.4s, v2.4s
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- ; CHECK-GI-NEXT: ret
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+ ; CHECK-LABEL: v4i32:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: cmlt v0.8h, v0.8h, #0
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+ ; CHECK-NEXT: ret
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%b = lshr <4 x i32 > %a , <i32 15 , i32 15 , i32 15 , i32 15 >
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%c = and <4 x i32 > %b , <i32 65537 , i32 65537 , i32 65537 , i32 65537 >
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%d = mul nuw <4 x i32 > %c , <i32 65535 , i32 65535 , i32 65535 , i32 65535 >
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ret <4 x i32 > %d
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}
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define <8 x i32 > @v8i32 (<8 x i32 > %a ) {
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- ; CHECK-SD-LABEL: v8i32:
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- ; CHECK-SD: // %bb.0:
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- ; CHECK-SD-NEXT: cmlt v0.8h, v0.8h, #0
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- ; CHECK-SD-NEXT: cmlt v1.8h, v1.8h, #0
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- ; CHECK-SD-NEXT: ret
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- ;
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- ; CHECK-GI-LABEL: v8i32:
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- ; CHECK-GI: // %bb.0:
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- ; CHECK-GI-NEXT: movi v2.8h, #1
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- ; CHECK-GI-NEXT: ushr v0.4s, v0.4s, #15
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- ; CHECK-GI-NEXT: ushr v1.4s, v1.4s, #15
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- ; CHECK-GI-NEXT: movi v3.2d, #0x00ffff0000ffff
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- ; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b
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- ; CHECK-GI-NEXT: and v1.16b, v1.16b, v2.16b
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- ; CHECK-GI-NEXT: mul v0.4s, v0.4s, v3.4s
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- ; CHECK-GI-NEXT: mul v1.4s, v1.4s, v3.4s
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- ; CHECK-GI-NEXT: ret
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+ ; CHECK-LABEL: v8i32:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: cmlt v0.8h, v0.8h, #0
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+ ; CHECK-NEXT: cmlt v1.8h, v1.8h, #0
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+ ; CHECK-NEXT: ret
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%b = lshr <8 x i32 > %a , <i32 15 , i32 15 , i32 15 , i32 15 , i32 15 , i32 15 , i32 15 , i32 15 >
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%c = and <8 x i32 > %b , <i32 65537 , i32 65537 , i32 65537 , i32 65537 , i32 65537 , i32 65537 , i32 65537 , i32 65537 >
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%d = mul nuw <8 x i32 > %c , <i32 65535 , i32 65535 , i32 65535 , i32 65535 , i32 65535 , i32 65535 , i32 65535 , i32 65535 >
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ret <8 x i32 > %d
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}
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define <4 x i16 > @v4i16 (<4 x i16 > %a ) {
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- ; CHECK-SD-LABEL: v4i16:
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- ; CHECK-SD: // %bb.0:
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- ; CHECK-SD-NEXT: cmlt v0.8b, v0.8b, #0
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- ; CHECK-SD-NEXT: ret
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- ;
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- ; CHECK-GI-LABEL: v4i16:
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- ; CHECK-GI: // %bb.0:
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- ; CHECK-GI-NEXT: movi v1.8b, #1
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- ; CHECK-GI-NEXT: ushr v0.4h, v0.4h, #7
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- ; CHECK-GI-NEXT: movi d2, #0xff00ff00ff00ff
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- ; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
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- ; CHECK-GI-NEXT: mul v0.4h, v0.4h, v2.4h
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- ; CHECK-GI-NEXT: ret
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+ ; CHECK-LABEL: v4i16:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: cmlt v0.8b, v0.8b, #0
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+ ; CHECK-NEXT: ret
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%b = lshr <4 x i16 > %a , <i16 7 , i16 7 , i16 7 , i16 7 >
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%c = and <4 x i16 > %b , <i16 257 , i16 257 , i16 257 , i16 257 >
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%d = mul nuw <4 x i16 > %c , <i16 255 , i16 255 , i16 255 , i16 255 >
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ret <4 x i16 > %d
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}
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define <8 x i16 > @v8i16 (<8 x i16 > %a ) {
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- ; CHECK-SD-LABEL: v8i16:
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- ; CHECK-SD: // %bb.0:
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- ; CHECK-SD-NEXT: cmlt v0.16b, v0.16b, #0
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- ; CHECK-SD-NEXT: ret
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- ;
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- ; CHECK-GI-LABEL: v8i16:
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- ; CHECK-GI: // %bb.0:
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- ; CHECK-GI-NEXT: movi v1.16b, #1
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- ; CHECK-GI-NEXT: ushr v0.8h, v0.8h, #7
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- ; CHECK-GI-NEXT: movi v2.2d, #0xff00ff00ff00ff
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- ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
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- ; CHECK-GI-NEXT: mul v0.8h, v0.8h, v2.8h
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- ; CHECK-GI-NEXT: ret
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+ ; CHECK-LABEL: v8i16:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: cmlt v0.16b, v0.16b, #0
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+ ; CHECK-NEXT: ret
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%b = lshr <8 x i16 > %a , <i16 7 , i16 7 , i16 7 , i16 7 , i16 7 , i16 7 , i16 7 , i16 7 >
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%c = and <8 x i16 > %b , <i16 257 , i16 257 , i16 257 , i16 257 , i16 257 , i16 257 , i16 257 , i16 257 >
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%d = mul nuw <8 x i16 > %c , <i16 255 , i16 255 , i16 255 , i16 255 , i16 255 , i16 255 , i16 255 , i16 255 >
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