Skip to content

Commit 3e6323a

Browse files
committed
[SPARC] Add v8plus feature bit
Implement handling for `v8plus` feature bit to allow the user to switch between V8 and V8+ mode with 32-bit code. This is done as a prerequisite for `-mv8plus` flag on clang (#98713).
1 parent 2feb058 commit 3e6323a

File tree

5 files changed

+27
-12
lines changed

5 files changed

+27
-12
lines changed

llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -132,6 +132,7 @@ namespace {
132132
class SparcAsmBackend : public MCAsmBackend {
133133
protected:
134134
bool Is64Bit;
135+
bool IsV8Plus;
135136
bool HasV9;
136137

137138
public:
@@ -140,6 +141,7 @@ namespace {
140141
? llvm::endianness::little
141142
: llvm::endianness::big),
142143
Is64Bit(STI.getTargetTriple().isArch64Bit()),
144+
IsV8Plus(STI.hasFeature(Sparc::FeatureV8Plus)),
143145
HasV9(STI.hasFeature(Sparc::FeatureV9)) {}
144146

145147
unsigned getNumFixupKinds() const override {
@@ -359,7 +361,7 @@ namespace {
359361
std::unique_ptr<MCObjectTargetWriter>
360362
createObjectTargetWriter() const override {
361363
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
362-
return createSparcELFObjectWriter(Is64Bit, HasV9, OSABI);
364+
return createSparcELFObjectWriter(Is64Bit, IsV8Plus, HasV9, OSABI);
363365
}
364366
};
365367

llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp

Lines changed: 12 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -21,11 +21,16 @@ using namespace llvm;
2121
namespace {
2222
class SparcELFObjectWriter : public MCELFObjectTargetWriter {
2323
public:
24-
SparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI)
24+
SparcELFObjectWriter(bool Is64Bit, bool IsV8Plus, bool HasV9, uint8_t OSABI)
2525
: MCELFObjectTargetWriter(
2626
Is64Bit, OSABI,
27-
Is64Bit ? ELF::EM_SPARCV9
28-
: (HasV9 ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
27+
Is64Bit
28+
? ELF::EM_SPARCV9
29+
// Note that we still need to emit an EM_SPARC32PLUS object
30+
// even when V8+ isn't explicitly requested, if we're
31+
// targeting a V9-capable CPU. This matches GAS behavior upon
32+
// encountering any V9 instructions in its input.
33+
: ((IsV8Plus || HasV9) ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
2934
/*HasRelocationAddend*/ true) {}
3035

3136
~SparcELFObjectWriter() override = default;
@@ -148,6 +153,8 @@ bool SparcELFObjectWriter::needsRelocateWithSymbol(const MCValue &,
148153
}
149154

150155
std::unique_ptr<MCObjectTargetWriter>
151-
llvm::createSparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI) {
152-
return std::make_unique<SparcELFObjectWriter>(Is64Bit, HasV9, OSABI);
156+
llvm::createSparcELFObjectWriter(bool Is64Bit, bool IsV8Plus, bool HasV9,
157+
uint8_t OSABI) {
158+
return std::make_unique<SparcELFObjectWriter>(Is64Bit, IsV8Plus, HasV9,
159+
OSABI);
153160
}

llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -34,8 +34,10 @@ MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
3434
MCAsmBackend *createSparcAsmBackend(const Target &T, const MCSubtargetInfo &STI,
3535
const MCRegisterInfo &MRI,
3636
const MCTargetOptions &Options);
37-
std::unique_ptr<MCObjectTargetWriter>
38-
createSparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI);
37+
std::unique_ptr<MCObjectTargetWriter> createSparcELFObjectWriter(bool Is64Bit,
38+
bool IsV8Plus,
39+
bool HasV9,
40+
uint8_t OSABI);
3941

4042
// Defines symbolic names for Sparc v9 ASI tag names.
4143
namespace SparcASITag {

llvm/lib/Target/Sparc/Sparc.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,9 @@ def FeatureNoFMULS
3434
def FeatureV9
3535
: SubtargetFeature<"v9", "IsV9", "true",
3636
"Enable SPARC-V9 instructions">;
37+
def FeatureV8Plus
38+
: SubtargetFeature<"v8plus", "IsV8Plus", "true",
39+
"Enable V8+ mode, allowing use of 64-bit V9 instructions in 32-bit code">;
3740
def FeatureV8Deprecated
3841
: SubtargetFeature<"deprecated-v8", "UseV8DeprecatedInsts", "true",
3942
"Enable deprecated V8 instructions in V9 mode">;

llvm/test/MC/Sparc/elf-sparc-machine-type.s

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,12 @@
11
## Emit correct machine type depending on triple and cpu options.
22
## - `-triple sparc` emits an object of type EM_SPARC;
3-
## - `-triple sparc -mcpu=v9` emits EM_SPARC32PLUS; and
3+
## - `-triple sparc -mcpu=v9` or `-triple sparc -mattr=+v8plus` emits EM_SPARC32PLUS; and
44
## - `-triple sparcv9` emits EM_SPARCV9.
55

6-
# RUN: llvm-mc -filetype=obj -triple sparc %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC %s
7-
# RUN: llvm-mc -filetype=obj -triple sparc -mcpu=v9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC32PLUS %s
8-
# RUN: llvm-mc -filetype=obj -triple sparcv9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARCV9 %s
6+
# RUN: llvm-mc -filetype=obj -triple sparc %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC %s
7+
# RUN: llvm-mc -filetype=obj -triple sparc -mcpu=v9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC32PLUS %s
8+
# RUN: llvm-mc -filetype=obj -triple sparc -mattr=+v8plus %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC32PLUS %s
9+
# RUN: llvm-mc -filetype=obj -triple sparcv9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARCV9 %s
910

1011
# SPARC: Machine: EM_SPARC (0x2)
1112
# SPARC32PLUS: Machine: EM_SPARC32PLUS (0x12)

0 commit comments

Comments
 (0)