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Partially revert 92e18ff (#101673)
It is likely to cause stage2 build failures: https://lab.llvm.org/buildbot/#/builders/122/builds/389 https://lab.llvm.org/buildbot/#/builders/79/builds/552 I don't have an ARM machine to investigate, so I'm just reverting ARM changes to see if it helps make the bots green again.
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3 files changed

+110
-19
lines changed

3 files changed

+110
-19
lines changed

llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1204,8 +1204,7 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
12041204
setOperationAction(ISD::ROTR, VT, Expand);
12051205
}
12061206
setOperationAction(ISD::CTTZ, MVT::i32, Custom);
1207-
setOperationAction(ISD::CTPOP, MVT::i32, LibCall);
1208-
setOperationAction(ISD::CTPOP, MVT::i64, LibCall);
1207+
setOperationAction(ISD::CTPOP, MVT::i32, Expand);
12091208
if (!Subtarget->hasV5TOps() || Subtarget->isThumb1Only()) {
12101209
setOperationAction(ISD::CTLZ, MVT::i32, Expand);
12111210
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, LibCall);

llvm/test/CodeGen/ARM/popcnt.ll

Lines changed: 59 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -324,19 +324,73 @@ define i32 @ctpop16(i16 %x) nounwind readnone {
324324
define i32 @ctpop32(i32 %x) nounwind readnone {
325325
; CHECK-LABEL: ctpop32:
326326
; CHECK: @ %bb.0:
327-
; CHECK-NEXT: b __popcountsi2
327+
; CHECK-NEXT: ldr r1, .LCPI22_0
328+
; CHECK-NEXT: ldr r2, .LCPI22_3
329+
; CHECK-NEXT: and r1, r1, r0, lsr #1
330+
; CHECK-NEXT: ldr r12, .LCPI22_1
331+
; CHECK-NEXT: sub r0, r0, r1
332+
; CHECK-NEXT: ldr r3, .LCPI22_2
333+
; CHECK-NEXT: and r1, r0, r2
334+
; CHECK-NEXT: and r0, r2, r0, lsr #2
335+
; CHECK-NEXT: add r0, r1, r0
336+
; CHECK-NEXT: add r0, r0, r0, lsr #4
337+
; CHECK-NEXT: and r0, r0, r12
338+
; CHECK-NEXT: mul r1, r0, r3
339+
; CHECK-NEXT: lsr r0, r1, #24
340+
; CHECK-NEXT: mov pc, lr
341+
; CHECK-NEXT: .p2align 2
342+
; CHECK-NEXT: @ %bb.1:
343+
; CHECK-NEXT: .LCPI22_0:
344+
; CHECK-NEXT: .long 1431655765 @ 0x55555555
345+
; CHECK-NEXT: .LCPI22_1:
346+
; CHECK-NEXT: .long 252645135 @ 0xf0f0f0f
347+
; CHECK-NEXT: .LCPI22_2:
348+
; CHECK-NEXT: .long 16843009 @ 0x1010101
349+
; CHECK-NEXT: .LCPI22_3:
350+
; CHECK-NEXT: .long 858993459 @ 0x33333333
328351
%count = tail call i32 @llvm.ctpop.i32(i32 %x)
329352
ret i32 %count
330353
}
331354

332355
define i32 @ctpop64(i64 %x) nounwind readnone {
333356
; CHECK-LABEL: ctpop64:
334357
; CHECK: @ %bb.0:
335-
; CHECK-NEXT: .save {r11, lr}
336-
; CHECK-NEXT: push {r11, lr}
337-
; CHECK-NEXT: bl __popcountdi2
338-
; CHECK-NEXT: pop {r11, lr}
358+
; CHECK-NEXT: .save {r4, lr}
359+
; CHECK-NEXT: push {r4, lr}
360+
; CHECK-NEXT: ldr r2, .LCPI23_0
361+
; CHECK-NEXT: ldr r3, .LCPI23_3
362+
; CHECK-NEXT: and r4, r2, r0, lsr #1
363+
; CHECK-NEXT: and r2, r2, r1, lsr #1
364+
; CHECK-NEXT: sub r0, r0, r4
365+
; CHECK-NEXT: sub r1, r1, r2
366+
; CHECK-NEXT: and r4, r0, r3
367+
; CHECK-NEXT: and r2, r1, r3
368+
; CHECK-NEXT: and r0, r3, r0, lsr #2
369+
; CHECK-NEXT: and r1, r3, r1, lsr #2
370+
; CHECK-NEXT: add r0, r4, r0
371+
; CHECK-NEXT: ldr lr, .LCPI23_1
372+
; CHECK-NEXT: add r1, r2, r1
373+
; CHECK-NEXT: ldr r12, .LCPI23_2
374+
; CHECK-NEXT: add r0, r0, r0, lsr #4
375+
; CHECK-NEXT: and r0, r0, lr
376+
; CHECK-NEXT: add r1, r1, r1, lsr #4
377+
; CHECK-NEXT: mul r2, r0, r12
378+
; CHECK-NEXT: and r0, r1, lr
379+
; CHECK-NEXT: mul r1, r0, r12
380+
; CHECK-NEXT: lsr r0, r2, #24
381+
; CHECK-NEXT: add r0, r0, r1, lsr #24
382+
; CHECK-NEXT: pop {r4, lr}
339383
; CHECK-NEXT: mov pc, lr
384+
; CHECK-NEXT: .p2align 2
385+
; CHECK-NEXT: @ %bb.1:
386+
; CHECK-NEXT: .LCPI23_0:
387+
; CHECK-NEXT: .long 1431655765 @ 0x55555555
388+
; CHECK-NEXT: .LCPI23_1:
389+
; CHECK-NEXT: .long 252645135 @ 0xf0f0f0f
390+
; CHECK-NEXT: .LCPI23_2:
391+
; CHECK-NEXT: .long 16843009 @ 0x1010101
392+
; CHECK-NEXT: .LCPI23_3:
393+
; CHECK-NEXT: .long 858993459 @ 0x33333333
340394
%count = tail call i64 @llvm.ctpop.i64(i64 %x)
341395
%conv = trunc i64 %count to i32
342396
ret i32 %conv

llvm/test/CodeGen/Thumb2/mve-ctpop.ll

Lines changed: 50 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,24 +1,62 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; NOTE: Assertions have been autoenerated by utils/update_llc_test_checks.py
23
; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK
34

45
define arm_aapcs_vfpcc <2 x i64> @ctpop_2i64_t(<2 x i64> %src){
56
; CHECK-LABEL: ctpop_2i64_t:
67
; CHECK: @ %bb.0: @ %entry
78
; CHECK-NEXT: .save {r4, r5, r7, lr}
89
; CHECK-NEXT: push {r4, r5, r7, lr}
9-
; CHECK-NEXT: .vsave {d8, d9}
10-
; CHECK-NEXT: vpush {d8, d9}
11-
; CHECK-NEXT: vmov q4, q0
12-
; CHECK-NEXT: vmov r0, r1, d9
13-
; CHECK-NEXT: bl __popcountdi2
14-
; CHECK-NEXT: mov r4, r0
15-
; CHECK-NEXT: mov r5, r1
16-
; CHECK-NEXT: vmov r0, r1, d8
17-
; CHECK-NEXT: bl __popcountdi2
18-
; CHECK-NEXT: vmov q0[2], q0[0], r0, r4
19-
; CHECK-NEXT: vmov q0[3], q0[1], r1, r5
20-
; CHECK-NEXT: vpop {d8, d9}
10+
; CHECK-NEXT: vmov r1, r2, d1
11+
; CHECK-NEXT: mov.w lr, #1431655765
12+
; CHECK-NEXT: vmov r3, r4, d0
13+
; CHECK-NEXT: mov.w r12, #858993459
14+
; CHECK-NEXT: vldr s1, .LCPI0_0
15+
; CHECK-NEXT: vmov.f32 s3, s1
16+
; CHECK-NEXT: and.w r0, lr, r2, lsr #1
17+
; CHECK-NEXT: subs r0, r2, r0
18+
; CHECK-NEXT: and.w r2, r12, r0, lsr #2
19+
; CHECK-NEXT: bic r0, r0, #-858993460
20+
; CHECK-NEXT: add r0, r2
21+
; CHECK-NEXT: and.w r2, lr, r1, lsr #1
22+
; CHECK-NEXT: subs r1, r1, r2
23+
; CHECK-NEXT: add.w r0, r0, r0, lsr #4
24+
; CHECK-NEXT: and.w r2, r12, r1, lsr #2
25+
; CHECK-NEXT: bic r1, r1, #-858993460
26+
; CHECK-NEXT: add r1, r2
27+
; CHECK-NEXT: and.w r2, lr, r3, lsr #1
28+
; CHECK-NEXT: subs r2, r3, r2
29+
; CHECK-NEXT: bic r5, r0, #-252645136
30+
; CHECK-NEXT: add.w r1, r1, r1, lsr #4
31+
; CHECK-NEXT: mov.w r0, #16843009
32+
; CHECK-NEXT: and.w r3, r12, r2, lsr #2
33+
; CHECK-NEXT: bic r2, r2, #-858993460
34+
; CHECK-NEXT: add r2, r3
35+
; CHECK-NEXT: and.w r3, lr, r4, lsr #1
36+
; CHECK-NEXT: subs r3, r4, r3
37+
; CHECK-NEXT: bic r1, r1, #-252645136
38+
; CHECK-NEXT: add.w r2, r2, r2, lsr #4
39+
; CHECK-NEXT: muls r5, r0, r5
40+
; CHECK-NEXT: and.w r4, r12, r3, lsr #2
41+
; CHECK-NEXT: bic r3, r3, #-858993460
42+
; CHECK-NEXT: bic r2, r2, #-252645136
43+
; CHECK-NEXT: add r3, r4
44+
; CHECK-NEXT: muls r1, r0, r1
45+
; CHECK-NEXT: add.w r3, r3, r3, lsr #4
46+
; CHECK-NEXT: muls r2, r0, r2
47+
; CHECK-NEXT: bic r3, r3, #-252645136
48+
; CHECK-NEXT: muls r0, r3, r0
49+
; CHECK-NEXT: lsrs r1, r1, #24
50+
; CHECK-NEXT: add.w r1, r1, r5, lsr #24
51+
; CHECK-NEXT: lsrs r2, r2, #24
52+
; CHECK-NEXT: vmov s2, r1
53+
; CHECK-NEXT: add.w r0, r2, r0, lsr #24
54+
; CHECK-NEXT: vmov s0, r0
2155
; CHECK-NEXT: pop {r4, r5, r7, pc}
56+
; CHECK-NEXT: .p2align 2
57+
; CHECK-NEXT: @ %bb.1:
58+
; CHECK-NEXT: .LCPI0_0:
59+
; CHECK-NEXT: .long 0x00000000 @ float 0
2260
entry:
2361
%0 = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %src)
2462
ret <2 x i64> %0

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