@@ -44735,7 +44735,10 @@ bool X86TargetLowering::isSplatValueForTargetNode(SDValue Op,
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// Helper to peek through bitops/trunc/setcc to determine size of source vector.
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// Allows combineBitcastvxi1 to determine what size vector generated a <X x i1>.
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static bool checkBitcastSrcVectorSize(SDValue Src, unsigned Size,
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- bool AllowTruncate) {
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+ bool AllowTruncate, unsigned Depth) {
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+ // Limit recursion.
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+ if (Depth >= SelectionDAG::MaxRecursionDepth)
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+ return false;
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switch (Src.getOpcode()) {
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case ISD::TRUNCATE:
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if (!AllowTruncate)
@@ -44744,17 +44747,22 @@ static bool checkBitcastSrcVectorSize(SDValue Src, unsigned Size,
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case ISD::SETCC:
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return Src.getOperand(0).getValueSizeInBits() == Size;
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case ISD::FREEZE:
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- return checkBitcastSrcVectorSize(Src.getOperand(0), Size, AllowTruncate);
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+ return checkBitcastSrcVectorSize(Src.getOperand(0), Size, AllowTruncate,
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+ Depth + 1);
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case ISD::AND:
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case ISD::XOR:
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case ISD::OR:
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- return checkBitcastSrcVectorSize(Src.getOperand(0), Size, AllowTruncate) &&
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- checkBitcastSrcVectorSize(Src.getOperand(1), Size, AllowTruncate);
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+ return checkBitcastSrcVectorSize(Src.getOperand(0), Size, AllowTruncate,
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+ Depth + 1) &&
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+ checkBitcastSrcVectorSize(Src.getOperand(1), Size, AllowTruncate,
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+ Depth + 1);
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case ISD::SELECT:
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case ISD::VSELECT:
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return Src.getOperand(0).getScalarValueSizeInBits() == 1 &&
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- checkBitcastSrcVectorSize(Src.getOperand(1), Size, AllowTruncate) &&
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- checkBitcastSrcVectorSize(Src.getOperand(2), Size, AllowTruncate);
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+ checkBitcastSrcVectorSize(Src.getOperand(1), Size, AllowTruncate,
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+ Depth + 1) &&
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+ checkBitcastSrcVectorSize(Src.getOperand(2), Size, AllowTruncate,
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+ Depth + 1);
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case ISD::BUILD_VECTOR:
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return ISD::isBuildVectorAllZeros(Src.getNode()) ||
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ISD::isBuildVectorAllOnes(Src.getNode());
@@ -44925,7 +44933,7 @@ static SDValue combineBitcastvxi1(SelectionDAG &DAG, EVT VT, SDValue Src,
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// For cases such as (i4 bitcast (v4i1 setcc v4i64 v1, v2))
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// sign-extend to a 256-bit operation to avoid truncation.
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if (Subtarget.hasAVX() &&
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- checkBitcastSrcVectorSize(Src, 256, Subtarget.hasAVX2())) {
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+ checkBitcastSrcVectorSize(Src, 256, Subtarget.hasAVX2(), 0 )) {
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SExtVT = MVT::v4i64;
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PropagateSExt = true;
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}
@@ -44937,8 +44945,8 @@ static SDValue combineBitcastvxi1(SelectionDAG &DAG, EVT VT, SDValue Src,
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// If the setcc operand is 128-bit, prefer sign-extending to 128-bit over
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// 256-bit because the shuffle is cheaper than sign extending the result of
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// the compare.
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- if (Subtarget.hasAVX() && (checkBitcastSrcVectorSize(Src, 256, true) ||
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- checkBitcastSrcVectorSize(Src, 512, true))) {
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+ if (Subtarget.hasAVX() && (checkBitcastSrcVectorSize(Src, 256, true, 0 ) ||
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+ checkBitcastSrcVectorSize(Src, 512, true, 0 ))) {
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SExtVT = MVT::v8i32;
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PropagateSExt = true;
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}
@@ -44963,7 +44971,7 @@ static SDValue combineBitcastvxi1(SelectionDAG &DAG, EVT VT, SDValue Src,
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break;
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}
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// Split if this is a <64 x i8> comparison result.
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- if (checkBitcastSrcVectorSize(Src, 512, false)) {
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+ if (checkBitcastSrcVectorSize(Src, 512, false, 0 )) {
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SExtVT = MVT::v64i8;
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break;
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}
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