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[JITLink][RISCV] Implement eh_frame handling (#68253)
This requires adding a `NegDelta32` edge kind that cannot be mapped to existing relocations. Co-authored-by: Job Noorman <[email protected]>
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7 files changed

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‎clang/test/Interpreter/simple-exception.cpp

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@@ -1,7 +1,7 @@
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// clang-format off
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// UNSUPPORTED: system-aix
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// XFAIL for arm, arm64, riscv, or running on Windows.
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// XFAIL: target={{(arm|riscv).*}}, system-windows
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// XFAIL for arm and arm64, or running on Windows.
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// XFAIL: target=arm{{.*}}, system-windows
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// RUN: cat %s | clang-repl | FileCheck %s
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// Incompatible with msan. It passes with -O3 but fail -Oz. Interpreter

‎clang/unittests/Interpreter/ExceptionTests/InterpreterExceptionTest.cpp

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@@ -122,11 +122,6 @@ extern "C" int throw_exception() {
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Triple.getArch() == llvm::Triple::aarch64_32))
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GTEST_SKIP();
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// FIXME: RISC-V fails as .eh_frame handling is not yet implemented in
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// JITLink for RISC-V. See PR #66067.
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if (Triple.isRISCV())
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GTEST_SKIP();
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llvm::cantFail(Interp->ParseAndExecute(ExceptionCode));
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testing::internal::CaptureStdout();
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auto ThrowException =

‎llvm/include/llvm/ExecutionEngine/JITLink/riscv.h

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@@ -214,6 +214,12 @@ enum EdgeKind_riscv : Edge::Kind {
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/// Linker relaxation will use this to ensure all code sequences are properly
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/// aligned and then remove these edges from the graph.
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AlignRelaxable,
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/// 32-bit negative delta.
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///
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/// Fixup expression:
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/// Fixup <- Fixup - Target + Addend
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NegDelta32,
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};
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/// Returns a string name for the given riscv edge. For debugging purposes

‎llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp

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@@ -11,10 +11,12 @@
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//===----------------------------------------------------------------------===//
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#include "llvm/ExecutionEngine/JITLink/ELF_riscv.h"
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#include "EHFrameSupportImpl.h"
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#include "ELFLinkGraphBuilder.h"
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#include "JITLinkGeneric.h"
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#include "PerGraphGOTAndPLTStubsBuilder.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/ExecutionEngine/JITLink/DWARFRecordSectionSplitter.h"
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#include "llvm/ExecutionEngine/JITLink/JITLink.h"
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#include "llvm/ExecutionEngine/JITLink/riscv.h"
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#include "llvm/Object/ELF.h"
@@ -456,6 +458,13 @@ class ELFJITLinker_riscv : public JITLinker<ELFJITLinker_riscv> {
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case AlignRelaxable:
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// Ignore when the relaxation pass did not run
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break;
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case NegDelta32: {
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int64_t Value = FixupAddress - E.getTarget().getAddress() + E.getAddend();
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if (LLVM_UNLIKELY(!isInRangeForImm(Value, 32)))
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return makeTargetOutOfRangeError(G, B, E);
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*(little32_t *)FixupPtr = static_cast<uint32_t>(Value);
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break;
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}
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}
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return Error::success();
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}
@@ -958,6 +967,13 @@ void link_ELF_riscv(std::unique_ptr<LinkGraph> G,
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PassConfiguration Config;
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const Triple &TT = G->getTargetTriple();
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if (Ctx->shouldAddDefaultTargetPasses(TT)) {
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Config.PrePrunePasses.push_back(DWARFRecordSectionSplitter(".eh_frame"));
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Config.PrePrunePasses.push_back(EHFrameEdgeFixer(
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".eh_frame", G->getPointerSize(), Edge::Invalid, Edge::Invalid,
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Edge::Invalid, Edge::Invalid, NegDelta32));
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Config.PrePrunePasses.push_back(EHFrameNullTerminator(".eh_frame"));
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if (auto MarkLive = Ctx->getMarkLivePass(TT))
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Config.PrePrunePasses.push_back(std::move(MarkLive));
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else

‎llvm/lib/ExecutionEngine/JITLink/riscv.cpp

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@@ -82,6 +82,8 @@ const char *getEdgeKindName(Edge::Kind K) {
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return "CallRelaxable";
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case AlignRelaxable:
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return "AlignRelaxable";
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case NegDelta32:
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return "NegDelta32";
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}
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return getGenericEdgeKindName(K);
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}

‎llvm/test/ExecutionEngine/JITLink/RISCV/ELF_ehframe.s

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@@ -0,0 +1,74 @@
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# REQUIRES: asserts
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# RUN: llvm-mc -triple=riscv32-linux-gnu -mattr=+relax -filetype=obj -o %t.32.o %s
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# RUN: llvm-jitlink -noexec -phony-externals -debug-only=jitlink %t.32.o 2>&1 | \
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# RUN: FileCheck %s
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# RUN: llvm-mc -triple=riscv64-linux-gnu -mattr=+relax -filetype=obj -o %t.64.o %s
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# RUN: llvm-jitlink -noexec -phony-externals -debug-only=jitlink %t.64.o 2>&1 | \
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# RUN: FileCheck %s
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# Check that splitting of eh-frame sections works.
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#
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# CHECK: DWARFRecordSectionSplitter: Processing .eh_frame...
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# CHECK: Processing block at
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# CHECK: Processing CFI record at
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# CHECK: Extracted {{.*}} section = .eh_frame
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# CHECK: Processing CFI record at
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# CHECK: Extracted {{.*}} section = .eh_frame
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# CHECK: EHFrameEdgeFixer: Processing .eh_frame in "{{.*}}"...
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# CHECK: Processing block at
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# CHECK: Record is CIE
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# CHECK: Processing block at
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# CHECK: Record is FDE
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# CHECK: Adding edge at {{.*}} to CIE at: {{.*}}
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# CHECK: Existing edge at {{.*}} to PC begin at {{.*}}
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# CHECK: Adding keep-alive edge from target at {{.*}} to FDE at {{.*}}
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# CHECK: Processing block at
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# CHECK: Record is FDE
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# CHECK: Adding edge at {{.*}} to CIE at: {{.*}}
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# CHECK: Existing edge at {{.*}} to PC begin at {{.*}}
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# CHECK: Adding keep-alive edge from target at {{.*}} to FDE at {{.*}}
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## This is "int main { throw 1; }" compiled for riscv32. We use the 32-bit
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## version because it is also legal for riscv64.
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.text
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.globl main
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.p2align 1
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.type main,@function
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main:
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.cfi_startproc
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addi sp, sp, -16
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.cfi_def_cfa_offset 16
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sw ra, 12(sp)
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.cfi_offset ra, -4
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li a0, 4
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call __cxa_allocate_exception
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li a1, 1
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sw a1, 0(a0)
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lga a1, _ZTIi
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li a2, 0
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call __cxa_throw
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.Lfunc_end0:
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.size main, .Lfunc_end0-main
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.cfi_endproc
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.globl dup
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.p2align 1
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.type dup,@function
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dup:
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.cfi_startproc
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addi sp, sp, -16
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.cfi_def_cfa_offset 16
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sw ra, 12(sp)
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.cfi_offset ra, -4
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li a0, 4
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call __cxa_allocate_exception
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li a1, 1
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sw a1, 0(a0)
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lga a1, _ZTIi
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li a2, 0
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call __cxa_throw
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.Lfunc_end1:
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.size dup, .Lfunc_end1-dup
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.cfi_endproc

‎llvm/test/ExecutionEngine/JITLink/RISCV/ELF_ehframe.test

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# RUN: yaml2obj -DELFCLASS=ELFCLASS32 -o %t.32.o %s
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# RUN: llvm-jitlink -noexec -check %s %t.32.o
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# RUN: yaml2obj -DELFCLASS=ELFCLASS64 -o %t.64.o %s
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# RUN: llvm-jitlink -noexec -check %s %t.64.o
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### Compiled from the following code with -mattr=+relax to force relocations for
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### address_range and DW_CFA_advance_loc (both needed for .balign).
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## .text
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## .globl main
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## .p2align 1
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## .type main,@function
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## main:
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## .cfi_startproc
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## .balign 8
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## addi sp, sp, -16
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## cfa_advance_loc:
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## .cfi_def_cfa_offset 16
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## nop
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## main_end:
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## .size main, main_end-main
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## .cfi_endproc
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--- !ELF
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FileHeader:
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Class: [[ELFCLASS]]
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Data: ELFDATA2LSB
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Type: ET_REL
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Machine: EM_RISCV
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SectionHeaderStringTable: .strtab
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Sections:
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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AddressAlign: 0x8
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Content: 13000000130101FF13000000
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- Name: .eh_frame
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC ]
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AddressAlign: 0x8
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Content: 1000000000000000017A5200017801011B0C02001000000018000000000000000000000000400E10
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- Name: .rela.text
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Type: SHT_RELA
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Flags: [ SHF_INFO_LINK ]
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Link: .symtab
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AddressAlign: 0x8
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Info: .text
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Relocations:
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- Type: R_RISCV_ALIGN
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Addend: 4
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- Name: .rela.eh_frame
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Type: SHT_RELA
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Flags: [ SHF_INFO_LINK ]
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Link: .symtab
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AddressAlign: 0x8
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Info: .eh_frame
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Relocations:
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- Offset: 0x1C
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Symbol: main
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Type: R_RISCV_32_PCREL
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- Offset: 0x20
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Symbol: main_end
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Type: R_RISCV_ADD32
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- Offset: 0x20
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Symbol: main
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Type: R_RISCV_SUB32
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- Offset: 0x25
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Symbol: cfa_advance_loc
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Type: R_RISCV_SET6
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- Offset: 0x25
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Symbol: main
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Type: R_RISCV_SUB6
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- Type: SectionHeaderTable
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Sections:
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- Name: .strtab
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- Name: .text
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- Name: .rela.text
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- Name: .eh_frame
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- Name: .rela.eh_frame
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- Name: .symtab
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Symbols:
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- Name: cfa_advance_loc
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Section: .text
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Value: 0x8
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- Name: main_end
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Section: .text
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Value: 0xC
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- Name: main
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Type: STT_FUNC
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Section: .text
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Binding: STB_GLOBAL
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Size: 0xC
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- Name: eh_frame
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Type: STT_SECTION
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Binding: STB_GLOBAL
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Section: .eh_frame
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Size: 0x28
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...
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## CIE_pointer
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# jitlink-check: *{4}(eh_frame + 0x1c) = main - (eh_frame + 0x1c)
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## address_range
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# jitlink-check: *{4}(eh_frame + 0x20) = main_end - main
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## DW_CFA_advance_loc
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# jitlink-check: (*{1}(eh_frame + 0x25)) & 0x3f = cfa_advance_loc - main

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