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Update tests; TODO fix sin+cos combining
1 parent 87e1cbb commit 51db17b

18 files changed

+270
-241
lines changed

‎llvm/test/CodeGen/AArch64/illegal-float-ops.ll

Lines changed: 38 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
2-
; RUN: llc -mtriple=aarch64-linux-android -verify-machineinstrs -o - %s | FileCheck %s
1+
; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GNU
2+
; RUN: llc -mtriple=aarch64-linux-android -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-ANDROID
33

44
@varfloat = global float 0.0
55
@vardouble = global double 0.0
@@ -22,7 +22,8 @@ define void @test_cos(float %float, double %double, fp128 %fp128) {
2222

2323
%cosfp128 = call fp128 @llvm.cos.f128(fp128 %fp128)
2424
store fp128 %cosfp128, ptr @varfp128
25-
; CHECK: bl cosl
25+
; CHECK-GNU: bl cosf128
26+
; CHECK-ANDROID: bl cosl
2627

2728
ret void
2829
}
@@ -44,7 +45,8 @@ define void @test_exp(float %float, double %double, fp128 %fp128) {
4445

4546
%expfp128 = call fp128 @llvm.exp.f128(fp128 %fp128)
4647
store fp128 %expfp128, ptr @varfp128
47-
; CHECK: bl expl
48+
; CHECK-GNU: bl expf128
49+
; CHECK-ANDROID: bl expl
4850

4951
ret void
5052
}
@@ -66,7 +68,8 @@ define void @test_exp2(float %float, double %double, fp128 %fp128) {
6668

6769
%exp2fp128 = call fp128 @llvm.exp2.f128(fp128 %fp128)
6870
store fp128 %exp2fp128, ptr @varfp128
69-
; CHECK: bl exp2l
71+
; CHECK-GNU: bl exp2f128
72+
; CHECK-ANDROID: bl exp2l
7073
ret void
7174

7275
}
@@ -88,7 +91,8 @@ define void @test_log(float %float, double %double, fp128 %fp128) {
8891

8992
%logfp128 = call fp128 @llvm.log.f128(fp128 %fp128)
9093
store fp128 %logfp128, ptr @varfp128
91-
; CHECK: bl logl
94+
; CHECK-GNU: bl logf128
95+
; CHECK-ANDROID: bl logl
9296

9397
ret void
9498
}
@@ -110,7 +114,8 @@ define void @test_log2(float %float, double %double, fp128 %fp128) {
110114

111115
%log2fp128 = call fp128 @llvm.log2.f128(fp128 %fp128)
112116
store fp128 %log2fp128, ptr @varfp128
113-
; CHECK: bl log2l
117+
; CHECK-GNU: bl log2f128
118+
; CHECK-ANDROID: bl log2l
114119
ret void
115120

116121
}
@@ -132,7 +137,8 @@ define void @test_log10(float %float, double %double, fp128 %fp128) {
132137

133138
%log10fp128 = call fp128 @llvm.log10.f128(fp128 %fp128)
134139
store fp128 %log10fp128, ptr @varfp128
135-
; CHECK: bl log10l
140+
; CHECK-GNU: bl log10f128
141+
; CHECK-ANDROID: bl log10l
136142

137143
ret void
138144
}
@@ -154,7 +160,8 @@ define void @test_sin(float %float, double %double, fp128 %fp128) {
154160

155161
%sinfp128 = call fp128 @llvm.sin.f128(fp128 %fp128)
156162
store fp128 %sinfp128, ptr @varfp128
157-
; CHECK: bl sinl
163+
; CHECK-GNU: bl sinf128
164+
; CHECK-ANDROID: bl sinl
158165
ret void
159166

160167
}
@@ -176,7 +183,8 @@ define void @test_tan(float %float, double %double, fp128 %fp128) {
176183

177184
%tanfp128 = call fp128 @llvm.tan.f128(fp128 %fp128)
178185
store fp128 %tanfp128, ptr @varfp128
179-
; CHECK: bl tanl
186+
; CHECK-GNU: bl tanf128
187+
; CHECK-ANDROID: bl tanl
180188
ret void
181189
}
182190

@@ -197,7 +205,8 @@ define void @test_acos(float %float, double %double, fp128 %fp128) {
197205

198206
%acosfp128 = call fp128 @llvm.acos.f128(fp128 %fp128)
199207
store fp128 %acosfp128, ptr @varfp128
200-
; CHECK: bl acosl
208+
; CHECK-GNU: bl acosf128
209+
; CHECK-ANDROID: bl acosl
201210
ret void
202211
}
203212

@@ -218,7 +227,8 @@ define void @test_asin(float %float, double %double, fp128 %fp128) {
218227

219228
%asinfp128 = call fp128 @llvm.asin.f128(fp128 %fp128)
220229
store fp128 %asinfp128, ptr @varfp128
221-
; CHECK: bl asinl
230+
; CHECK-GNU: bl asinf128
231+
; CHECK-ANDROID: bl asinl
222232
ret void
223233
}
224234

@@ -239,7 +249,8 @@ define void @test_atan(float %float, double %double, fp128 %fp128) {
239249

240250
%atanfp128 = call fp128 @llvm.atan.f128(fp128 %fp128)
241251
store fp128 %atanfp128, ptr @varfp128
242-
; CHECK: bl atanl
252+
; CHECK-GNU: bl atanf128
253+
; CHECK-ANDROID: bl atanl
243254
ret void
244255
}
245256

@@ -260,7 +271,8 @@ define void @test_atan2(float %float1, double %double1, fp128 %fp1281, float %fl
260271

261272
%atan2fp128 = call fp128 @llvm.atan2.f128(fp128 %fp1281, fp128 %fp1282)
262273
store fp128 %atan2fp128, ptr @varfp128
263-
; CHECK: bl atan2l
274+
; CHECK-GNU: bl atan2f128
275+
; CHECK-ANDROID: bl atan2l
264276
ret void
265277
}
266278

@@ -281,7 +293,8 @@ define void @test_cosh(float %float, double %double, fp128 %fp128) {
281293

282294
%coshfp128 = call fp128 @llvm.cosh.f128(fp128 %fp128)
283295
store fp128 %coshfp128, ptr @varfp128
284-
; CHECK: bl coshl
296+
; CHECK-GNU: bl coshf128
297+
; CHECK-ANDROID: bl coshl
285298
ret void
286299
}
287300

@@ -302,7 +315,8 @@ define void @test_sinh(float %float, double %double, fp128 %fp128) {
302315

303316
%sinhfp128 = call fp128 @llvm.sinh.f128(fp128 %fp128)
304317
store fp128 %sinhfp128, ptr @varfp128
305-
; CHECK: bl sinhl
318+
; CHECK-GNU: bl sinhf128
319+
; CHECK-ANDROID: bl sinhl
306320
ret void
307321
}
308322

@@ -323,7 +337,8 @@ define void @test_tanh(float %float, double %double, fp128 %fp128) {
323337

324338
%tanhfp128 = call fp128 @llvm.tanh.f128(fp128 %fp128)
325339
store fp128 %tanhfp128, ptr @varfp128
326-
; CHECK: bl tanhl
340+
; CHECK-GNU: bl tanhf128
341+
; CHECK-ANDROID: bl tanhl
327342
ret void
328343
}
329344

@@ -344,7 +359,8 @@ define void @test_pow(float %float, double %double, fp128 %fp128) {
344359

345360
%powfp128 = call fp128 @llvm.pow.f128(fp128 %fp128, fp128 %fp128)
346361
store fp128 %powfp128, ptr @varfp128
347-
; CHECK: bl powl
362+
; CHECK-GNU: bl powf128
363+
; CHECK-ANDROID: bl powl
348364

349365
ret void
350366
}
@@ -384,7 +400,8 @@ define void @test_frem(float %float, double %double, fp128 %fp128) {
384400

385401
%fremfp128 = frem fp128 %fp128, %fp128
386402
store fp128 %fremfp128, ptr @varfp128
387-
; CHECK: bl fmodl
403+
; CHECK-GNU: bl fmodf128
404+
; CHECK-ANDROID: bl fmodl
388405

389406
ret void
390407
}
@@ -396,7 +413,8 @@ define void @test_fma(fp128 %fp128) {
396413

397414
%fmafp128 = call fp128 @llvm.fma.f128(fp128 %fp128, fp128 %fp128, fp128 %fp128)
398415
store fp128 %fmafp128, ptr @varfp128
399-
; CHECK: bl fmal
416+
; CHECK-GNU: bl fmaf128
417+
; CHECK-ANDROID: bl fmal
400418

401419
ret void
402420
}

‎llvm/test/CodeGen/AArch64/sincos-expansion.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ define fp128 @test_sincos_f128(fp128 %f) {
4343
%sin = call fp128 @sinl(fp128 %f) readnone
4444
%cos = call fp128 @cosl(fp128 %f) readnone
4545
%val = fadd fp128 %sin, %cos
46-
; CHECK: bl sincosl
46+
; CHECK: bl sincosf128
4747
ret fp128 %val
4848
}
4949

@@ -52,8 +52,8 @@ define fp128 @test_sincos_f128_errno(fp128 %f) {
5252
%sin = call fp128 @sinl(fp128 %f)
5353
%cos = call fp128 @cosl(fp128 %f)
5454
%val = fadd fp128 %sin, %cos
55-
; CHECK: bl sinl
56-
; CHECK: bl cosl
55+
; CHECK: bl sinf128
56+
; CHECK: bl cosf128
5757
ret fp128 %val
5858
}
5959

‎llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -583,7 +583,7 @@ define float @test_v3f32_ninf(<3 x float> %a) nounwind {
583583
define fp128 @test_v2f128(<2 x fp128> %a) nounwind {
584584
; CHECK-LABEL: test_v2f128:
585585
; CHECK: // %bb.0:
586-
; CHECK-NEXT: b fmaxl
586+
; CHECK-NEXT: b fmaxf128
587587
%b = call fp128 @llvm.vector.reduce.fmax.v2f128(<2 x fp128> %a)
588588
ret fp128 %b
589589
}

‎llvm/test/CodeGen/ARM/ldexp.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,8 +38,8 @@ entry:
3838
declare float @ldexpf(float, i32) memory(none)
3939

4040
define fp128 @testExpl(fp128 %val, i32 %a) {
41-
; LINUX: bl ldexpl
42-
; WINDOWS: b.w ldexpl
41+
; LINUX: bl ldexpf128
42+
; WINDOWS: b.w ldexpf128
4343
entry:
4444
%call = tail call fast fp128 @ldexpl(fp128 %val, i32 %a)
4545
ret fp128 %call

‎llvm/test/CodeGen/ARM/llvm.sincos.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,7 @@ define { fp128, fp128 } @test_sincos_f128(fp128 %a) {
206206
; CHECK-NEXT: mov r0, r1
207207
; CHECK-NEXT: mov r1, r2
208208
; CHECK-NEXT: mov r2, r12
209-
; CHECK-NEXT: bl sincosl
209+
; CHECK-NEXT: bl sincosf128
210210
; CHECK-NEXT: ldrd r2, r3, [sp, #16]
211211
; CHECK-NEXT: ldrd r12, r1, [sp, #8]
212212
; CHECK-NEXT: str r3, [r4, #28]

‎llvm/test/CodeGen/Mips/cconv/fmaxl_call.ll

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,14 @@ define fp128 @call_fmaxl(fp128 %a, fp128 %b) {
88
; CHECK-NEXT: .cfi_def_cfa_offset 16
99
; CHECK-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
1010
; CHECK-NEXT: .cfi_offset 31, -8
11-
; CHECK-NEXT: jal fmaxl
12-
; CHECK-NEXT: nop
13-
; CHECK-NEXT: mov.d $f12, $f0
11+
; CHECK-NEXT: dmfc1 $4, $f12
12+
; CHECK-NEXT: dmfc1 $5, $f13
13+
; CHECK-NEXT: dmfc1 $6, $f14
14+
; CHECK-NEXT: jal fmaxf128
15+
; CHECK-NEXT: dmfc1 $7, $f15
16+
; CHECK-NEXT: dmtc1 $2, $f12
1417
; CHECK-NEXT: jal f
15-
; CHECK-NEXT: mov.d $f13, $f2
18+
; CHECK-NEXT: dmtc1 $3, $f13
1619
; CHECK-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
1720
; CHECK-NEXT: jr $ra
1821
; CHECK-NEXT: daddiu $sp, $sp, 16

‎llvm/test/CodeGen/Mips/cconv/roundl-call.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
define void @roundl_call(fp128 %value) {
2626
entry:
2727
; ALL-LABEL: roundl_call:
28-
; N32: lw $25, %call16(roundl)($gp)
28+
; N32: lw $25, %call16(roundf128)($gp)
2929
; N64: ld $25, %call16(roundl)($gp)
3030

3131
; SOFT-FLOAT: sd $4, 8(${{[0-9]+}})

‎llvm/test/CodeGen/PowerPC/f128-arith.ll

Lines changed: 32 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -425,14 +425,19 @@ define fp128 @qp_sincos(ptr nocapture readonly %a) nounwind {
425425
; CHECK-NEXT: mflr r0
426426
; CHECK-NEXT: stdu r1, -64(r1)
427427
; CHECK-NEXT: std r0, 80(r1)
428-
; CHECK-NEXT: addi r5, r1, 48
429-
; CHECK-NEXT: addi r6, r1, 32
430-
; CHECK-NEXT: lxv v2, 0(r3)
431-
; CHECK-NEXT: bl sincosf128
428+
; CHECK-NEXT: stxv v31, 48(r1) # 16-byte Folded Spill
429+
; CHECK-NEXT: stxv v30, 32(r1) # 16-byte Folded Spill
430+
; CHECK-NEXT: lxv v31, 0(r3)
431+
; CHECK-NEXT: vmr v2, v31
432+
; CHECK-NEXT: bl cosf128
433+
; CHECK-NEXT: nop
434+
; CHECK-NEXT: vmr v30, v2
435+
; CHECK-NEXT: vmr v2, v31
436+
; CHECK-NEXT: bl sinf128
432437
; CHECK-NEXT: nop
433-
; CHECK-NEXT: lxv v2, 48(r1)
434-
; CHECK-NEXT: lxv v3, 32(r1)
435-
; CHECK-NEXT: xsmulqp v2, v3, v2
438+
; CHECK-NEXT: xsmulqp v2, v30, v2
439+
; CHECK-NEXT: lxv v31, 48(r1) # 16-byte Folded Reload
440+
; CHECK-NEXT: lxv v30, 32(r1) # 16-byte Folded Reload
436441
; CHECK-NEXT: addi r1, r1, 64
437442
; CHECK-NEXT: ld r0, 16(r1)
438443
; CHECK-NEXT: mtlr r0
@@ -441,28 +446,31 @@ define fp128 @qp_sincos(ptr nocapture readonly %a) nounwind {
441446
; CHECK-P8-LABEL: qp_sincos:
442447
; CHECK-P8: # %bb.0: # %entry
443448
; CHECK-P8-NEXT: mflr r0
444-
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
445-
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
446-
; CHECK-P8-NEXT: stdu r1, -96(r1)
447-
; CHECK-P8-NEXT: std r0, 112(r1)
448-
; CHECK-P8-NEXT: addi r30, r1, 48
449-
; CHECK-P8-NEXT: addi r29, r1, 32
449+
; CHECK-P8-NEXT: stdu r1, -80(r1)
450+
; CHECK-P8-NEXT: std r0, 96(r1)
451+
; CHECK-P8-NEXT: li r4, 48
450452
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
451-
; CHECK-P8-NEXT: mr r5, r30
452-
; CHECK-P8-NEXT: mr r6, r29
453-
; CHECK-P8-NEXT: xxswapd v2, vs0
454-
; CHECK-P8-NEXT: bl sincosf128
453+
; CHECK-P8-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
454+
; CHECK-P8-NEXT: li r4, 64
455+
; CHECK-P8-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
456+
; CHECK-P8-NEXT: xxswapd v31, vs0
457+
; CHECK-P8-NEXT: vmr v2, v31
458+
; CHECK-P8-NEXT: bl cosf128
455459
; CHECK-P8-NEXT: nop
456-
; CHECK-P8-NEXT: lxvd2x vs0, 0, r29
457-
; CHECK-P8-NEXT: xxswapd v2, vs0
458-
; CHECK-P8-NEXT: lxvd2x vs0, 0, r30
459-
; CHECK-P8-NEXT: xxswapd v3, vs0
460+
; CHECK-P8-NEXT: vmr v30, v2
461+
; CHECK-P8-NEXT: vmr v2, v31
462+
; CHECK-P8-NEXT: bl sinf128
463+
; CHECK-P8-NEXT: nop
464+
; CHECK-P8-NEXT: vmr v3, v2
465+
; CHECK-P8-NEXT: vmr v2, v30
460466
; CHECK-P8-NEXT: bl __mulkf3
461467
; CHECK-P8-NEXT: nop
462-
; CHECK-P8-NEXT: addi r1, r1, 96
468+
; CHECK-P8-NEXT: li r3, 64
469+
; CHECK-P8-NEXT: lxvd2x v31, r1, r3 # 16-byte Folded Reload
470+
; CHECK-P8-NEXT: li r3, 48
471+
; CHECK-P8-NEXT: lxvd2x v30, r1, r3 # 16-byte Folded Reload
472+
; CHECK-P8-NEXT: addi r1, r1, 80
463473
; CHECK-P8-NEXT: ld r0, 16(r1)
464-
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
465-
; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
466474
; CHECK-P8-NEXT: mtlr r0
467475
; CHECK-P8-NEXT: blr
468476
entry:

‎llvm/test/CodeGen/SystemZ/atomicrmw-fmax-03.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ define void @f1(ptr %ret, ptr %src, ptr %b) {
1919
; CHECK: la %r4, 160(%r15)
2020
; CHECK: std [[FSL]], 176(%r15)
2121
; CHECK: std [[FSH]], 184(%r15)
22-
; CHECK: brasl %r14, fmaxl@PLT
22+
; CHECK: brasl %r14, fmaxf128@PLT
2323
; CHECK: lg [[RH:%r[0-9]+]], 200(%r15)
2424
; CHECK: lg [[RL:%r[0-9]+]], 192(%r15)
2525
; CHECK: lgdr [[RSH:%r[0-9]+]], [[FSH]]

‎llvm/test/CodeGen/SystemZ/atomicrmw-fmin-03.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ define void @f1(ptr %ret, ptr %src, ptr %b) {
1919
; CHECK: la %r4, 160(%r15)
2020
; CHECK: std [[FSL]], 176(%r15)
2121
; CHECK: std [[FSH]], 184(%r15)
22-
; CHECK: brasl %r14, fminl@PLT
22+
; CHECK: brasl %r14, fminf128@PLT
2323
; CHECK: lg [[RH:%r[0-9]+]], 200(%r15)
2424
; CHECK: lg [[RL:%r[0-9]+]], 192(%r15)
2525
; CHECK: lgdr [[RSH:%r[0-9]+]], [[FSH]]

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