[Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO

When -triple is windows, SelectionDAGLegalize process Legalizing
br_jt, would generate ISD::JUMP_TABLE_DEBUG_INFO.
Then Mips process emitInstruction, would think JUMP_TABLE_DEBUG_INFO
is a pseudo instruction and generate an error `Pseudo opcode found
in emitInstruction()`.
This instruction `TargetOpcode::JUMP_TABLE_DEBUG_INFO` is only used
to note jump table debug info, so we can ignore it when Mips emit
instruction.

Fix #134916.

Author: yingopq

llvm/lib/Target/Mips/MipsAsmPrinter.cpp

@@ -269,6 +269,17 @@ void MipsAsmPrinter::emitInstruction(const MachineInstr *MI) {
       continue;
     }
 
+    // This instruction is only used to note jump table debug info, we
+    // did not need to emit it.
+    if (I->getOpcode() == TargetOpcode::JUMP_TABLE_DEBUG_INFO) {
+      LLVM_DEBUG(
+          dbgs()
+          << DEBUG_TYPE
+          << ": JUMP_TABLE_DEBUG_INFO is an instruction which was used to "
+             "note jump table debug info, did not emit it."
+          << "\n");
+      continue;
+    }
     // The inMips16Mode() test is not permanent.
     // Some instructions are marked as pseudo right now which
     // would make the test fail for the wrong reason but

llvm/test/CodeGen/Mips/jumptable_windows.ll

@@ -0,0 +1,119 @@
+; RUN: llc -mtriple=mipsel-windows-gnu < %s | FileCheck %s -check-prefix=MIPSEL
+
+@.str = private unnamed_addr constant [2 x i8] c"A\00", align 1
+@.str.1 = private unnamed_addr constant [2 x i8] c"B\00", align 1
+@.str.2 = private unnamed_addr constant [2 x i8] c"C\00", align 1
+@.str.3 = private unnamed_addr constant [2 x i8] c"D\00", align 1
+@.str.4 = private unnamed_addr constant [2 x i8] c"E\00", align 1
+@.str.5 = private unnamed_addr constant [2 x i8] c"F\00", align 1
+@.str.6 = private unnamed_addr constant [2 x i8] c"G\00", align 1
+@.str.7 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
+
+define ptr @jumptable(i32 signext %Letter) nounwind {
+; MIPSEL-LABEL: jumptable:
+; MIPSEL:       # %bb.0: # %entry
+; MIPSEL-NEXT:    addiu $sp, $sp, -16
+; MIPSEL-NEXT:    sltiu	$1, $4, 7
+; MIPSEL-NEXT:    beqz $1, LBB0_6
+; MIPSEL-NEXT:    sw $4, 4($sp)
+; MIPSEL-NEXT:  # %bb.1: # %entry
+; MIPSEL-NEXT:    sll $1, $4, 2
+; MIPSEL-NEXT:    lui $2, %hi($JTI0_0)
+; MIPSEL-NEXT:    addu $1, $1, $2
+; MIPSEL-NEXT:    lw $1, %lo($JTI0_0)($1)
+; MIPSEL-NEXT:    jr $1
+; MIPSEL-NEXT:  LBB0_2: # %sw.bb
+; MIPSEL-NEXT:    lui $1, %hi($.str)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_3: # %sw.bb4
+; MIPSEL-NEXT:    lui $1, %hi($.str.4)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.4)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_4: # %sw.bb2
+; MIPSEL-NEXT:    lui $1, %hi($.str.2)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.2)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_5: # %sw.bb3
+; MIPSEL-NEXT:    lui $1, %hi($.str.3)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.3)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_6: # %sw.epilog
+; MIPSEL-NEXT:    lui $1, %hi($.str.7)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.7)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_7: # %sw.bb1
+; MIPSEL-NEXT:    lui $1, %hi($.str.1)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.1)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_8: # %sw.bb5
+; MIPSEL-NEXT:    lui $1, %hi($.str.5)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.5)
+; MIPSEL-NEXT:    j LBB0_10
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_9: # %sw.bb6
+; MIPSEL-NEXT:    lui $1, %hi($.str.6)
+; MIPSEL-NEXT:    addiu	$1, $1, %lo($.str.6)
+; MIPSEL-NEXT:    sw $1, 8($sp)
+; MIPSEL-NEXT:  LBB0_10: # %return
+; MIPSEL-NEXT:    lw $2, 8($sp)
+; MIPSEL-NEXT:    jr $ra
+; MIPSEL-NEXT:    addiu	$sp, $sp, 16
+
+entry:
+  %retval = alloca ptr, align 8
+  %Letter.addr = alloca i32, align 4
+  store i32 %Letter, ptr %Letter.addr, align 4
+  %0 = load i32, ptr %Letter.addr, align 4
+  switch i32 %0, label %sw.epilog [
+    i32 0, label %sw.bb
+    i32 1, label %sw.bb1
+    i32 2, label %sw.bb2
+    i32 3, label %sw.bb3
+    i32 4, label %sw.bb4
+    i32 5, label %sw.bb5
+    i32 6, label %sw.bb6
+  ]
+
+sw.bb:
+  store ptr @.str, ptr %retval, align 8
+  br label %return
+
+sw.bb1:
+  store ptr @.str.1, ptr %retval, align 8
+  br label %return
+
+sw.bb2:
+  store ptr @.str.2, ptr %retval, align 8
+  br label %return
+
+sw.bb3:
+  store ptr @.str.3, ptr %retval, align 8
+  br label %return
+
+sw.bb4:
+  store ptr @.str.4, ptr %retval, align 8
+  br label %return
+
+sw.bb5:
+  store ptr @.str.5, ptr %retval, align 8
+  br label %return
+
+sw.bb6:
+  store ptr @.str.6, ptr %retval, align 8
+  br label %return
+
+sw.epilog:
+  store ptr @.str.7, ptr %retval, align 8
+  br label %return
+
+return:
+  %1 = load ptr, ptr %retval, align 8
+  ret ptr %1
+}