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[CIR][LLVMLowering] Upstream Bitcast lowering (#140774)
This change adds support for lowering BitCastOp
1 parent 9db6c32 commit 584616c

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2 files changed

+25
-4
lines changed

2 files changed

+25
-4
lines changed

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -530,10 +530,18 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
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llvmSrcVal);
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return mlir::success();
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}
533-
case cir::CastKind::bitcast:
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case cir::CastKind::bitcast: {
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mlir::Type dstTy = castOp.getType();
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mlir::Type llvmDstTy = getTypeConverter()->convertType(dstTy);
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assert(!MissingFeatures::cxxABI());
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assert(!MissingFeatures::dataMemberType());
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break;
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mlir::Value llvmSrcVal = adaptor.getOperands().front();
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rewriter.replaceOpWithNewOp<mlir::LLVM::BitcastOp>(castOp, llvmDstTy,
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llvmSrcVal);
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return mlir::success();
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}
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case cir::CastKind::ptr_to_bool: {
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mlir::Value llvmSrcVal = adaptor.getOperands().front();
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mlir::Value zeroPtr = rewriter.create<mlir::LLVM::ZeroOp>(

clang/test/CIR/CodeGen/cast.cpp

Lines changed: 15 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@ unsigned char cxxstaticcast_0(unsigned int x) {
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// LLVM: %[[R:[0-9]+]] = load i8, ptr %[[RV]], align 1
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// LLVM: ret i8 %[[R]]
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28-
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int cStyleCasts_0(unsigned x1, int x2, float x3, short x4, double x5) {
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// CIR: cir.func @_Z13cStyleCasts_0jifsd
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// LLVM: define i32 @_Z13cStyleCasts_0jifsd
@@ -103,10 +102,24 @@ void should_not_cast() {
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bool x2;
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bool ib = (bool)x2; // identity
106-
105+
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(void) ib; // void cast
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}
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// CIR: cir.func @_Z15should_not_castv
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// CIR-NOT: cir.cast
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// CIR: cir.return
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typedef int vi4 __attribute__((vector_size(16)));
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typedef double vd2 __attribute__((vector_size(16)));
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void bitcast() {
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vd2 a = {};
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vi4 b = (vi4)a;
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}
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// CIR: %[[D_VEC:.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<2 x !cir.double>>, !cir.vector<2 x !cir.double>
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// CIR: %[[I_VEC:.*]] = cir.cast(bitcast, %[[D_VEC]] : !cir.vector<2 x !cir.double>), !cir.vector<4 x !s32i>
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// LLVM: %[[D_VEC:.*]] = load <2 x double>, ptr {{.*}}, align 16
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// LLVM: %[[I_VEC:.*]] = bitcast <2 x double> %[[D_VEC]] to <4 x i32>

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