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Clang: Add elementwise minnum/maxnum builtin functions (#129207)
With #112852, we claimed that llvm.minnum and llvm.maxnum should treat +0.0>-0.0, while libc doesn't require fmin(3)/fmax(3) for it. To make llvm.minnum/llvm.maxnum easy to use, we define the builtin functions for them, include __builtin_elementwise_minnum __builtin_elementwise_maxnum All of them support _Float16, __bf16, float, double, long double.
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‎clang/docs/LanguageExtensions.rst

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@@ -818,7 +818,23 @@ of different sizes and signs is forbidden in binary and ternary builtins.
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T __builtin_elementwise_fmod(T x, T y) return The floating-point remainder of (x/y) whose sign floating point types
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matches the sign of x.
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T __builtin_elementwise_max(T x, T y) return x or y, whichever is larger integer and floating point types
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For floating point types, follows semantics of maxNum
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in IEEE 754-2008. See `LangRef
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<http://llvm.org/docs/LangRef.html#llvm-min-intrinsics-comparation>`_
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for the comparison.
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T __builtin_elementwise_min(T x, T y) return x or y, whichever is smaller integer and floating point types
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For floating point types, follows semantics of minNum
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in IEEE 754-2008. See `LangRef
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<http://llvm.org/docs/LangRef.html#llvm-min-intrinsics-comparation>`_
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for the comparison.
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T __builtin_elementwise_maxnum(T x, T y) return x or y, whichever is larger. Follows IEEE 754-2008 floating point types
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semantics (maxNum) with +0.0>-0.0. See `LangRef
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<http://llvm.org/docs/LangRef.html#llvm-min-intrinsics-comparation>`_
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for the comparison.
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T __builtin_elementwise_minnum(T x, T y) return x or y, whichever is smaller. Follows IEEE 754-2008 floating point types
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semantics (minNum) with +0.0>-0.0. See `LangRef
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<http://llvm.org/docs/LangRef.html#llvm-min-intrinsics-comparation>`_
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for the comparison.
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T __builtin_elementwise_add_sat(T x, T y) return the sum of x and y, clamped to the range of integer types
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representable values for the signed/unsigned integer type.
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T __builtin_elementwise_sub_sat(T x, T y) return the difference of x and y, clamped to the range of integer types

‎clang/docs/ReleaseNotes.rst

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@@ -191,6 +191,7 @@ Non-comprehensive list of changes in this release
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- Support parsing the `cc` operand modifier and alias it to the `c` modifier (#GH127719).
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- Added `__builtin_elementwise_exp10`.
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- For AMDPGU targets, added `__builtin_v_cvt_off_f32_i4` that maps to the `v_cvt_off_f32_i4` instruction.
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- Added `__builtin_elementwise_minnum` and `__builtin_elementwise_maxnum`.
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New Compiler Flags
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------------------

‎clang/include/clang/Basic/Builtins.td

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@@ -1304,6 +1304,18 @@ def ElementwiseMin : Builtin {
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let Prototype = "void(...)";
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}
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def ElementwiseMaxNum : Builtin {
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let Spellings = ["__builtin_elementwise_maxnum"];
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let Attributes = [NoThrow, Const, CustomTypeChecking];
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let Prototype = "void(...)";
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}
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def ElementwiseMinNum : Builtin {
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let Spellings = ["__builtin_elementwise_minnum"];
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let Attributes = [NoThrow, Const, CustomTypeChecking];
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let Prototype = "void(...)";
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}
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def ElementwiseMaximum : Builtin {
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let Spellings = ["__builtin_elementwise_maximum"];
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let Attributes = [NoThrow, Const, CustomTypeChecking];

‎clang/lib/CodeGen/CGBuiltin.cpp

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@@ -3818,6 +3818,22 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
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return RValue::get(Result);
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}
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case Builtin::BI__builtin_elementwise_maxnum: {
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Value *Op0 = EmitScalarExpr(E->getArg(0));
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Value *Op1 = EmitScalarExpr(E->getArg(1));
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Value *Result = Builder.CreateBinaryIntrinsic(llvm::Intrinsic::maxnum, Op0,
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Op1, nullptr, "elt.maxnum");
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return RValue::get(Result);
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}
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case Builtin::BI__builtin_elementwise_minnum: {
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Value *Op0 = EmitScalarExpr(E->getArg(0));
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Value *Op1 = EmitScalarExpr(E->getArg(1));
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Value *Result = Builder.CreateBinaryIntrinsic(llvm::Intrinsic::minnum, Op0,
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Op1, nullptr, "elt.minnum");
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return RValue::get(Result);
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}
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case Builtin::BI__builtin_elementwise_maximum: {
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Value *Op0 = EmitScalarExpr(E->getArg(0));
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Value *Op1 = EmitScalarExpr(E->getArg(1));

‎clang/lib/Sema/SemaChecking.cpp

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@@ -2762,6 +2762,8 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, unsigned BuiltinID,
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// These builtins restrict the element type to floating point
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// types only, and take in two arguments.
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case Builtin::BI__builtin_elementwise_minnum:
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case Builtin::BI__builtin_elementwise_maxnum:
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case Builtin::BI__builtin_elementwise_minimum:
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case Builtin::BI__builtin_elementwise_maximum:
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case Builtin::BI__builtin_elementwise_atan2:

‎clang/test/CodeGen/builtin-maxnum-minnum.c

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@@ -0,0 +1,171 @@
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
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// RUN: %clang_cc1 -x c++ -std=c++20 -disable-llvm-passes -O3 -triple x86_64 %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK
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typedef _Float16 half8 __attribute__((ext_vector_type(8)));
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typedef __bf16 bf16x8 __attribute__((ext_vector_type(8)));
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typedef float float4 __attribute__((ext_vector_type(4)));
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typedef double double2 __attribute__((ext_vector_type(2)));
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typedef long double ldouble2 __attribute__((ext_vector_type(2)));
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// CHECK-LABEL: define dso_local noundef <8 x half> @_Z7pfmin16Dv8_DF16_S_(
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// CHECK-SAME: <8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <8 x half>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x half>, align 16
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// CHECK-NEXT: store <8 x half> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2:![0-9]+]]
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// CHECK-NEXT: store <8 x half> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <8 x half>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <8 x half>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MINNUM:%.*]] = call <8 x half> @llvm.minnum.v8f16(<8 x half> [[TMP0]], <8 x half> [[TMP1]])
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// CHECK-NEXT: ret <8 x half> [[ELT_MINNUM]]
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//
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half8 pfmin16(half8 a, half8 b) {
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return __builtin_elementwise_minnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <8 x bfloat> @_Z8pfmin16bDv8_DF16bS_(
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// CHECK-SAME: <8 x bfloat> noundef [[A:%.*]], <8 x bfloat> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <8 x bfloat>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x bfloat>, align 16
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// CHECK-NEXT: store <8 x bfloat> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <8 x bfloat> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MINNUM:%.*]] = call <8 x bfloat> @llvm.minnum.v8bf16(<8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]])
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// CHECK-NEXT: ret <8 x bfloat> [[ELT_MINNUM]]
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//
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bf16x8 pfmin16b(bf16x8 a, bf16x8 b) {
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return __builtin_elementwise_minnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <4 x float> @_Z7pfmin32Dv4_fS_(
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// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <4 x float>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x float>, align 16
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// CHECK-NEXT: store <4 x float> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <4 x float> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MINNUM:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
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// CHECK-NEXT: ret <4 x float> [[ELT_MINNUM]]
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//
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float4 pfmin32(float4 a, float4 b) {
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return __builtin_elementwise_minnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <2 x double> @_Z7pfmin64Dv2_dS_(
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// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <2 x double>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x double>, align 16
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// CHECK-NEXT: store <2 x double> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <2 x double> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MINNUM:%.*]] = call <2 x double> @llvm.minnum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]])
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// CHECK-NEXT: ret <2 x double> [[ELT_MINNUM]]
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//
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double2 pfmin64(double2 a, double2 b) {
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return __builtin_elementwise_minnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <2 x x86_fp80> @_Z7pfmin80Dv2_eS_(
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// CHECK-SAME: ptr noundef byval(<2 x x86_fp80>) align 32 [[TMP0:%.*]], ptr noundef byval(<2 x x86_fp80>) align 32 [[TMP1:%.*]]) #[[ATTR2:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <2 x x86_fp80>, align 32
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x x86_fp80>, align 32
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// CHECK-NEXT: [[A:%.*]] = load <2 x x86_fp80>, ptr [[TMP0]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[B:%.*]] = load <2 x x86_fp80>, ptr [[TMP1]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <2 x x86_fp80> [[A]], ptr [[A_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <2 x x86_fp80> [[B]], ptr [[B_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP2:%.*]] = load <2 x x86_fp80>, ptr [[A_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP3:%.*]] = load <2 x x86_fp80>, ptr [[B_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MINNUM:%.*]] = call <2 x x86_fp80> @llvm.minnum.v2f80(<2 x x86_fp80> [[TMP2]], <2 x x86_fp80> [[TMP3]])
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// CHECK-NEXT: ret <2 x x86_fp80> [[ELT_MINNUM]]
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//
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ldouble2 pfmin80(ldouble2 a, ldouble2 b) {
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return __builtin_elementwise_minnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <8 x half> @_Z7pfmax16Dv8_DF16_S_(
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// CHECK-SAME: <8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <8 x half>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x half>, align 16
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// CHECK-NEXT: store <8 x half> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <8 x half> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <8 x half>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <8 x half>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MAXNUM:%.*]] = call <8 x half> @llvm.maxnum.v8f16(<8 x half> [[TMP0]], <8 x half> [[TMP1]])
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// CHECK-NEXT: ret <8 x half> [[ELT_MAXNUM]]
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//
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half8 pfmax16(half8 a, half8 b) {
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return __builtin_elementwise_maxnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <8 x bfloat> @_Z8pfmax16bDv8_DF16bS_(
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// CHECK-SAME: <8 x bfloat> noundef [[A:%.*]], <8 x bfloat> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <8 x bfloat>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x bfloat>, align 16
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// CHECK-NEXT: store <8 x bfloat> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <8 x bfloat> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MAXNUM:%.*]] = call <8 x bfloat> @llvm.maxnum.v8bf16(<8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]])
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// CHECK-NEXT: ret <8 x bfloat> [[ELT_MAXNUM]]
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//
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bf16x8 pfmax16b(bf16x8 a, bf16x8 b) {
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return __builtin_elementwise_maxnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <4 x float> @_Z7pfmax32Dv4_fS_(
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// CHECK-SAME: <4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <4 x float>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x float>, align 16
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// CHECK-NEXT: store <4 x float> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <4 x float> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MAXNUM:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
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// CHECK-NEXT: ret <4 x float> [[ELT_MAXNUM]]
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//
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float4 pfmax32(float4 a, float4 b) {
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return __builtin_elementwise_maxnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <2 x double> @_Z7pfmax64Dv2_dS_(
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// CHECK-SAME: <2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <2 x double>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x double>, align 16
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// CHECK-NEXT: store <2 x double> [[A]], ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <2 x double> [[B]], ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[A_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[B_ADDR]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MAXNUM:%.*]] = call <2 x double> @llvm.maxnum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]])
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// CHECK-NEXT: ret <2 x double> [[ELT_MAXNUM]]
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//
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double2 pfmax64(double2 a, double2 b) {
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return __builtin_elementwise_maxnum(a, b);
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}
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// CHECK-LABEL: define dso_local noundef <2 x x86_fp80> @_Z7pfmax80Dv2_eS_(
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// CHECK-SAME: ptr noundef byval(<2 x x86_fp80>) align 32 [[TMP0:%.*]], ptr noundef byval(<2 x x86_fp80>) align 32 [[TMP1:%.*]]) #[[ATTR2]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca <2 x x86_fp80>, align 32
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x x86_fp80>, align 32
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// CHECK-NEXT: [[A:%.*]] = load <2 x x86_fp80>, ptr [[TMP0]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[B:%.*]] = load <2 x x86_fp80>, ptr [[TMP1]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <2 x x86_fp80> [[A]], ptr [[A_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: store <2 x x86_fp80> [[B]], ptr [[B_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP2:%.*]] = load <2 x x86_fp80>, ptr [[A_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[TMP3:%.*]] = load <2 x x86_fp80>, ptr [[B_ADDR]], align 32, !tbaa [[TBAA2]]
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// CHECK-NEXT: [[ELT_MINNUM:%.*]] = call <2 x x86_fp80> @llvm.minnum.v2f80(<2 x x86_fp80> [[TMP2]], <2 x x86_fp80> [[TMP3]])
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// CHECK-NEXT: ret <2 x x86_fp80> [[ELT_MINNUM]]
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//
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ldouble2 pfmax80(ldouble2 a, ldouble2 b) {
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return __builtin_elementwise_minnum(a, b);
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}
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//.
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// CHECK: [[TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
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// CHECK: [[META3]] = !{!"omnipotent char", [[META4:![0-9]+]], i64 0}
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// CHECK: [[META4]] = !{!"Simple C++ TBAA"}
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//.

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