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oskarwirgaoskarwirga
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Refactor recomputeLiveIns to operate on whole CFG (#79498)
Currently, the way that recomputeLiveIns works is that it will recompute the livein registers for that MachineBasicBlock but it matters what order you call recomputeLiveIn which can result in incorrect register allocations down the line. This PR fixes that by simply recomputing the liveins for the entire CFG until convergence is achieved. This makes it harder to introduce subtle bugs which alter liveness.
1 parent 2a06850 commit 59bf605

30 files changed

+1996
-1698
lines changed

‎llvm/include/llvm/CodeGen/LivePhysRegs.h

Lines changed: 23 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131

3232
#include "llvm/ADT/SparseSet.h"
3333
#include "llvm/CodeGen/MachineBasicBlock.h"
34+
#include "llvm/CodeGen/MachineFunction.h"
3435
#include "llvm/CodeGen/TargetRegisterInfo.h"
3536
#include "llvm/MC/MCRegister.h"
3637
#include "llvm/MC/MCRegisterInfo.h"
@@ -193,11 +194,31 @@ void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs);
193194
void computeAndAddLiveIns(LivePhysRegs &LiveRegs,
194195
MachineBasicBlock &MBB);
195196

196-
/// Convenience function for recomputing live-in's for \p MBB.
197-
static inline void recomputeLiveIns(MachineBasicBlock &MBB) {
197+
/// Function to update the live-in's for a basic block and return whether any
198+
/// changes were made.
199+
static inline bool updateBlockLiveInfo(MachineBasicBlock &MBB) {
198200
LivePhysRegs LPR;
201+
auto oldLiveIns = MBB.getLiveIns();
202+
199203
MBB.clearLiveIns();
200204
computeAndAddLiveIns(LPR, MBB);
205+
MBB.sortUniqueLiveIns();
206+
207+
auto newLiveIns = MBB.getLiveIns();
208+
return oldLiveIns != newLiveIns;
209+
}
210+
211+
/// Convenience function for recomputing live-in's for the entire CFG until
212+
/// convergence is reached.
213+
static inline void recomputeLiveIns(MachineFunction &MF) {
214+
bool anyChanged;
215+
do {
216+
anyChanged = false;
217+
for (auto MFI = MF.rbegin(), MFE = MF.rend(); MFI != MFE; ++MFI) {
218+
MachineBasicBlock &MBB = *MFI;
219+
anyChanged |= updateBlockLiveInfo(MBB);
220+
}
221+
} while (anyChanged);
201222
}
202223

203224
} // end namespace llvm

‎llvm/include/llvm/CodeGen/MachineBasicBlock.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,6 +111,10 @@ class MachineBasicBlock
111111

112112
RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
113113
: PhysReg(PhysReg), LaneMask(LaneMask) {}
114+
115+
bool operator==(const RegisterMaskPair &other) const {
116+
return PhysReg == other.PhysReg && LaneMask == other.LaneMask;
117+
}
114118
};
115119

116120
private:
@@ -473,6 +477,8 @@ class MachineBasicBlock
473477
/// Remove entry from the livein set and return iterator to the next.
474478
livein_iterator removeLiveIn(livein_iterator I);
475479

480+
std::vector<RegisterMaskPair> getLiveIns() const { return LiveIns; }
481+
476482
class liveout_iterator {
477483
public:
478484
using iterator_category = std::input_iterator_tag;

‎llvm/lib/CodeGen/BranchFolding.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2048,8 +2048,7 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
20482048
FBB->erase(FBB->begin(), FIB);
20492049

20502050
if (UpdateLiveIns) {
2051-
recomputeLiveIns(*TBB);
2052-
recomputeLiveIns(*FBB);
2051+
recomputeLiveIns(*MBB->getParent());
20532052
}
20542053

20552054
++NumHoist;

‎llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4339,8 +4339,7 @@ AArch64FrameLowering::inlineStackProbeLoopExactMultiple(
43394339
ExitMBB->transferSuccessorsAndUpdatePHIs(&MBB);
43404340
MBB.addSuccessor(LoopMBB);
43414341
// Update liveins.
4342-
recomputeLiveIns(*LoopMBB);
4343-
recomputeLiveIns(*ExitMBB);
4342+
recomputeLiveIns(MF);
43444343

43454344
return ExitMBB->begin();
43464345
}

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9597,9 +9597,7 @@ AArch64InstrInfo::probedStackAlloc(MachineBasicBlock::iterator MBBI,
95979597

95989598
// Update liveins.
95999599
if (MF.getRegInfo().reservedRegsFrozen()) {
9600-
recomputeLiveIns(*LoopTestMBB);
9601-
recomputeLiveIns(*LoopBodyMBB);
9602-
recomputeLiveIns(*ExitMBB);
9600+
recomputeLiveIns(MF);
96039601
}
96049602

96059603
return ExitMBB->begin();

‎llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1806,12 +1806,7 @@ void ARMLowOverheadLoops::Expand(LowOverheadLoop &LoLoop) {
18061806
PostOrderLoopTraversal DFS(LoLoop.ML, *MLI);
18071807
DFS.ProcessLoop();
18081808
const SmallVectorImpl<MachineBasicBlock*> &PostOrder = DFS.getOrder();
1809-
for (auto *MBB : PostOrder) {
1810-
recomputeLiveIns(*MBB);
1811-
// FIXME: For some reason, the live-in print order is non-deterministic for
1812-
// our tests and I can't out why... So just sort them.
1813-
MBB->sortUniqueLiveIns();
1814-
}
1809+
recomputeLiveIns(*LoLoop.MF);
18151810

18161811
for (auto *MBB : reverse(PostOrder))
18171812
recomputeLivenessFlags(*MBB);

‎llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -208,8 +208,7 @@ bool PPCExpandAtomicPseudo::expandAtomicRMW128(
208208
.addMBB(LoopMBB);
209209
CurrentMBB->addSuccessor(LoopMBB);
210210
CurrentMBB->addSuccessor(ExitMBB);
211-
recomputeLiveIns(*LoopMBB);
212-
recomputeLiveIns(*ExitMBB);
211+
recomputeLiveIns(*MF);
213212
NMBBI = MBB.end();
214213
MI.eraseFromParent();
215214
return true;
@@ -286,9 +285,7 @@ bool PPCExpandAtomicPseudo::expandAtomicCmpSwap128(
286285
CurrentMBB->addSuccessor(LoopCmpMBB);
287286
CurrentMBB->addSuccessor(ExitMBB);
288287

289-
recomputeLiveIns(*LoopCmpMBB);
290-
recomputeLiveIns(*CmpSuccMBB);
291-
recomputeLiveIns(*ExitMBB);
288+
recomputeLiveIns(*MF);
292289
NMBBI = MBB.end();
293290
MI.eraseFromParent();
294291
return true;

‎llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1441,8 +1441,7 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
14411441
ProbeLoopBodyMBB->addSuccessor(ProbeLoopBodyMBB);
14421442
}
14431443
// Update liveins.
1444-
recomputeLiveIns(*ProbeLoopBodyMBB);
1445-
recomputeLiveIns(*ProbeExitMBB);
1444+
recomputeLiveIns(MF);
14461445
return ProbeExitMBB;
14471446
};
14481447
// For case HasBP && MaxAlign > 1, we have to realign the SP by performing
@@ -1534,8 +1533,7 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
15341533
buildDefCFAReg(*ExitMBB, ExitMBB->begin(), SPReg);
15351534
}
15361535
// Update liveins.
1537-
recomputeLiveIns(*LoopMBB);
1538-
recomputeLiveIns(*ExitMBB);
1536+
recomputeLiveIns(MF);
15391537
}
15401538
}
15411539
++NumPrologProbed;

‎llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -840,8 +840,7 @@ void SystemZELFFrameLowering::inlineStackProbe(
840840
StackAllocMI->eraseFromParent();
841841
if (DoneMBB != nullptr) {
842842
// Compute the live-in lists for the new blocks.
843-
recomputeLiveIns(*DoneMBB);
844-
recomputeLiveIns(*LoopMBB);
843+
recomputeLiveIns(MF);
845844
}
846845
}
847846

@@ -1439,8 +1438,7 @@ void SystemZXPLINKFrameLowering::inlineStackProbe(
14391438
StackAllocMI->eraseFromParent();
14401439

14411440
// Compute the live-in lists for the new blocks.
1442-
recomputeLiveIns(*NextMBB);
1443-
recomputeLiveIns(*StackExtMBB);
1441+
recomputeLiveIns(MF);
14441442
}
14451443

14461444
bool SystemZXPLINKFrameLowering::hasFP(const MachineFunction &MF) const {

‎llvm/lib/Target/X86/X86FrameLowering.cpp

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -885,8 +885,7 @@ void X86FrameLowering::emitStackProbeInlineGenericLoop(
885885
}
886886

887887
// Update Live In information
888-
recomputeLiveIns(*testMBB);
889-
recomputeLiveIns(*tailMBB);
888+
recomputeLiveIns(MF);
890889
}
891890

892891
void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
@@ -1378,10 +1377,7 @@ void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
13781377
footMBB->addSuccessor(&MBB);
13791378
}
13801379

1381-
recomputeLiveIns(*headMBB);
1382-
recomputeLiveIns(*bodyMBB);
1383-
recomputeLiveIns(*footMBB);
1384-
recomputeLiveIns(MBB);
1380+
recomputeLiveIns(MF);
13851381
}
13861382
} else {
13871383
MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)

‎llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ body: |
8282
; CHECK-LABEL: name: f
8383
; CHECK: bb.0.entry:
8484
; CHECK-NEXT: successors: %bb.3(0x80000000)
85-
; CHECK-NEXT: liveins: $lr, $fp
85+
; CHECK-NEXT: liveins: $fp, $lr
8686
; CHECK-NEXT: {{ $}}
8787
; CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store (s64) into %stack.2), (store (s64) into %stack.1)
8888
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16

‎llvm/test/CodeGen/SystemZ/branch-folder-hoist-livein.mir

Lines changed: 25 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
12
# RUN: llc -verify-machineinstrs -O1 -mtriple=s390x-ibm-linux -o - %s -run-pass=branch-folder | FileCheck %s
23
--- |
34
target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
@@ -15,6 +16,30 @@
1516
name: f1
1617
tracksRegLiveness: true
1718
body: |
19+
; CHECK-LABEL: name: f1
20+
; CHECK: bb.0:
21+
; CHECK-NEXT: successors: %bb.2(0x7fffffff), %bb.1(0x00000001)
22+
; CHECK-NEXT: {{ $}}
23+
; CHECK-NEXT: renamable $r1d = LGRL @b :: (load (s32) from got, align 8)
24+
; CHECK-NEXT: renamable $r1l = LH killed renamable $r1d, 0, $noreg, implicit-def $r1d :: (dereferenceable load (s8) from @b)
25+
; CHECK-NEXT: renamable $r2l = LHI 0
26+
; CHECK-NEXT: renamable $r3d = LGRL @d :: (load (s32) from got, align 8)
27+
; CHECK-NEXT: renamable $r4d = LLILL 0, implicit-def $r4q
28+
; CHECK-NEXT: renamable $r4d = COPY killed renamable $r4d, implicit killed $r4q
29+
; CHECK-NEXT: CHI killed renamable $r2l, 0, implicit-def $cc
30+
; CHECK-NEXT: BRC 14, 6, %bb.2, implicit killed $cc
31+
; CHECK-NEXT: {{ $}}
32+
; CHECK-NEXT: bb.1:
33+
; CHECK-NEXT: successors:
34+
; CHECK-NEXT: liveins: $r3d, $r4d, $r1l
35+
; CHECK-NEXT: {{ $}}
36+
; CHECK-NEXT: STH renamable $r1l, killed renamable $r3d, 0, $noreg, implicit killed $r4d :: (store (s8) into @d)
37+
; CHECK-NEXT: {{ $}}
38+
; CHECK-NEXT: bb.2:
39+
; CHECK-NEXT: liveins: $r3d, $r4d, $r1l
40+
; CHECK-NEXT: {{ $}}
41+
; CHECK-NEXT: STH renamable $r1l, killed renamable $r3d, 0, $noreg, implicit killed $r4d :: (store (s8) into @d)
42+
; CHECK-NEXT: Return
1843
bb.0:
1944
successors: %bb.2(0x7fffffff), %bb.1(0x00000001)
2045
liveins:
@@ -44,14 +69,3 @@ body: |
4469
Return
4570

4671
...
47-
48-
# CHECK: renamable $r4d = COPY killed renamable $r4d, implicit killed $r4q
49-
# CHECK-NEXT: CHI killed renamable $r2l, 0, implicit-def $cc
50-
# CHECK-NEXT: BRC 14, 6, %bb.2, implicit killed $cc
51-
# CHECK-NEXT: {{^ $}}
52-
# CHECK-NEXT: bb.1:
53-
# CHECK-NEXT: successors:
54-
# CHECK-NEXT: liveins: $r1l, $r3d, $r4d
55-
56-
# CHECK: bb.2:
57-
# CHECK-NEXT: liveins: $r1l, $r3d, $r4d

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