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shiltianshiltian
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Reapply "[Attributor] Enable AAAddressSpace for OpenMPOpt (#65544)"
This reverts commit e592c2d.
1 parent 4411d1e commit 5de71fd

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6 files changed

+30
-26
lines changed

6 files changed

+30
-26
lines changed

‎llvm/lib/Transforms/IPO/OpenMPOpt.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5569,6 +5569,8 @@ void OpenMPOpt::registerAAsForFunction(Attributor &A, const Function &F) {
55695569
bool UsedAssumedInformation = false;
55705570
A.getAssumedSimplified(IRPosition::value(*LI), /* AA */ nullptr,
55715571
UsedAssumedInformation, AA::Interprocedural);
5572+
A.getOrCreateAAFor<AAAddressSpace>(
5573+
IRPosition::value(*LI->getPointerOperand()));
55725574
continue;
55735575
}
55745576
if (auto *CI = dyn_cast<CallBase>(&I)) {
@@ -5578,6 +5580,8 @@ void OpenMPOpt::registerAAsForFunction(Attributor &A, const Function &F) {
55785580
}
55795581
if (auto *SI = dyn_cast<StoreInst>(&I)) {
55805582
A.getOrCreateAAFor<AAIsDead>(IRPosition::value(*SI));
5583+
A.getOrCreateAAFor<AAAddressSpace>(
5584+
IRPosition::value(*SI->getPointerOperand()));
55815585
continue;
55825586
}
55835587
if (auto *FI = dyn_cast<FenceInst>(&I)) {

‎llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -116,6 +116,7 @@ cond.end: ; preds = %cond.true, %entry
116116
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EE3setIJLm0ELm0EEJiEEEbjjRKNS0_13ViewDimensionIJXspT_EEEENS0_5ALL_tEDpT0_.internalized
117117
; CHECK-SAME: (ptr nocapture writeonly [[THIS:%.*]]) #[[ATTR1]] {
118118
; CHECK-NEXT: entry:
119+
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[THIS]] to ptr addrspace(5)
119120
; CHECK-NEXT: ret i1 false
120121
;
121122
;

‎llvm/test/Transforms/OpenMP/barrier_removal.ll

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -269,10 +269,9 @@ define void @neg_empty_2() "kernel" {
269269
define void @pos_constant_loads() "kernel" {
270270
; CHECK-LABEL: define {{[^@]+}}@pos_constant_loads
271271
; CHECK-SAME: () #[[ATTR4]] {
272-
; CHECK-NEXT: [[ARG:%.*]] = load ptr addrspace(4), ptr addrspacecast (ptr addrspace(4) @GPtr4 to ptr), align 8
273-
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspacecast (ptr addrspace(4) @GC2 to ptr), align 4
274-
; CHECK-NEXT: [[ARGC:%.*]] = addrspacecast ptr addrspace(4) [[ARG]] to ptr
275-
; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[ARGC]], align 4
272+
; CHECK-NEXT: [[ARG:%.*]] = load ptr addrspace(4), ptr addrspace(4) @GPtr4, align 8
273+
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspace(4) @GC2, align 4
274+
; CHECK-NEXT: [[C:%.*]] = load i32, ptr addrspace(4) [[ARG]], align 4
276275
; CHECK-NEXT: [[D:%.*]] = add i32 42, [[B]]
277276
; CHECK-NEXT: [[E:%.*]] = add i32 [[D]], [[C]]
278277
; CHECK-NEXT: call void @useI32(i32 [[E]])
@@ -303,7 +302,7 @@ define void @neg_loads() "kernel" {
303302
; CHECK-NEXT: [[ARG:%.*]] = load ptr, ptr @GPtr, align 8
304303
; CHECK-NEXT: [[A:%.*]] = load i32, ptr @G, align 4
305304
; CHECK-NEXT: call void @aligned_barrier()
306-
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspacecast (ptr addrspace(3) @GS to ptr), align 4
305+
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspace(3) @GS, align 4
307306
; CHECK-NEXT: call void @aligned_barrier()
308307
; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[ARG]], align 4
309308
; CHECK-NEXT: call void @aligned_barrier()
@@ -335,9 +334,8 @@ define void @pos_priv_mem() "kernel" {
335334
; CHECK-NEXT: [[LOC:%.*]] = alloca i32, align 4, addrspace(5)
336335
; CHECK-NEXT: [[A:%.*]] = load i32, ptr @PG1, align 4
337336
; CHECK-NEXT: store i32 [[A]], ptr addrspace(5) [[LOC]], align 4
338-
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspacecast (ptr addrspace(5) @PG2 to ptr), align 4
339-
; CHECK-NEXT: [[ARGC:%.*]] = addrspacecast ptr addrspace(5) [[ARG]] to ptr
340-
; CHECK-NEXT: store i32 [[B]], ptr [[ARGC]], align 4
337+
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspace(5) @PG2, align 4
338+
; CHECK-NEXT: store i32 [[B]], ptr addrspace(5) [[ARG]], align 4
341339
; CHECK-NEXT: [[V:%.*]] = load i32, ptr addrspace(5) [[LOC]], align 4
342340
; CHECK-NEXT: store i32 [[V]], ptr @PG1, align 4
343341
; CHECK-NEXT: ret void
@@ -370,7 +368,7 @@ define void @neg_mem() "kernel" {
370368
; CHECK-NEXT: store i32 [[A]], ptr [[ARG]], align 4
371369
; CHECK-NEXT: fence release
372370
; CHECK-NEXT: call void @aligned_barrier()
373-
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspacecast (ptr addrspace(1) @G2 to ptr), align 4
371+
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspace(1) @G2, align 4
374372
; CHECK-NEXT: store i32 [[B]], ptr @G1, align 4
375373
; CHECK-NEXT: fence acquire
376374
; CHECK-NEXT: ret void

‎llvm/test/Transforms/OpenMP/heap-to-shared-missing-declarations.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ define internal void @func() {
2222
; CHECK-LABEL: define {{[^@]+}}@func
2323
; CHECK-SAME: () #[[ATTR1]] {
2424
; CHECK-NEXT: bb:
25-
; CHECK-NEXT: [[I:%.*]] = load ptr, ptr null, align 4294967296
25+
; CHECK-NEXT: [[I:%.*]] = load ptr, ptr addrspace(5) null, align 4294967296
2626
; CHECK-NEXT: store i64 0, ptr [[I]], align 8
2727
; CHECK-NEXT: ret void
2828
;

‎llvm/test/Transforms/OpenMP/nested_parallelism.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -60,11 +60,11 @@ define weak_odr protected void @__omp_offloading_10302_bd7e0_main_l13(ptr %dyn,
6060
; CHECK-NEXT: br i1 [[TMP3]], label [[REGION_GUARDED_I:%.*]], label [[_Z3FOOI_INTERNALIZED_EXIT:%.*]]
6161
; CHECK: region.guarded.i:
6262
; CHECK-NEXT: [[I_ADDR_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[I:%.*]] to i32
63-
; CHECK-NEXT: store i32 [[I_ADDR_SROA_0_0_EXTRACT_TRUNC]], ptr addrspacecast (ptr addrspace(3) @i_shared to ptr), align 16
63+
; CHECK-NEXT: store i32 [[I_ADDR_SROA_0_0_EXTRACT_TRUNC]], ptr addrspace(3) @i_shared, align 16
6464
; CHECK-NEXT: br label [[_Z3FOOI_INTERNALIZED_EXIT]]
6565
; CHECK: _Z3fooi.internalized.exit:
6666
; CHECK-NEXT: tail call void @__kmpc_barrier_simple_spmd(ptr nonnull @[[GLOB1]], i32 [[TMP2]]) #[[ATTR2]]
67-
; CHECK-NEXT: store ptr addrspacecast (ptr addrspace(3) @i_shared to ptr), ptr [[CAPTURED_VARS_ADDRS_I]], align 8
67+
; CHECK-NEXT: store ptr addrspace(3) @i_shared, ptr [[CAPTURED_VARS_ADDRS_I]], align 8
6868
; CHECK-NEXT: call void @__kmpc_parallel_51(ptr nonnull @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr nonnull @__omp_outlined__, ptr nonnull @__omp_outlined___wrapper, ptr nonnull [[CAPTURED_VARS_ADDRS_I]], i64 1)
6969
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[CAPTURED_VARS_ADDRS_I]])
7070
; CHECK-NEXT: call void @__kmpc_target_deinit()
@@ -140,8 +140,8 @@ define weak_odr protected void @__omp_offloading_10302_bd7e0_main_l16(ptr %dyn,
140140
; CHECK-NEXT: [[I_ADDR_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[I:%.*]] to i32
141141
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[CAPTURED_VARS_ADDRS_I]])
142142
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @__kmpc_global_thread_num(ptr nonnull @[[GLOB1]]) #[[ATTR2]]
143-
; CHECK-NEXT: store i32 [[I_ADDR_SROA_0_0_EXTRACT_TRUNC]], ptr addrspacecast (ptr addrspace(3) @i.i_shared to ptr), align 16
144-
; CHECK-NEXT: store ptr addrspacecast (ptr addrspace(3) @i.i_shared to ptr), ptr [[CAPTURED_VARS_ADDRS_I]], align 8
143+
; CHECK-NEXT: store i32 [[I_ADDR_SROA_0_0_EXTRACT_TRUNC]], ptr addrspace(3) @i.i_shared, align 16
144+
; CHECK-NEXT: store ptr addrspace(3) @i.i_shared, ptr [[CAPTURED_VARS_ADDRS_I]], align 8
145145
; CHECK-NEXT: call void @__kmpc_parallel_51(ptr nonnull @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr nonnull @__omp_outlined__1, ptr nonnull @__omp_outlined__1_wrapper, ptr nonnull [[CAPTURED_VARS_ADDRS_I]], i64 1)
146146
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[CAPTURED_VARS_ADDRS_I]])
147147
; CHECK-NEXT: call void @__kmpc_target_deinit()

‎llvm/test/Transforms/OpenMP/spmdization_kernel_env_dep.ll

Lines changed: 13 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -27,21 +27,22 @@ define i32 @fputs() {
2727
define internal i32 @__kmpc_target_init(ptr %0, ptr %dyn) {
2828
; AMDGPU-LABEL: define {{[^@]+}}@__kmpc_target_init
2929
; AMDGPU-SAME: (ptr [[TMP0:%.*]], ptr [[DYN:%.*]]) #[[ATTR1:[0-9]+]] {
30-
; AMDGPU-NEXT: [[TMP2:%.*]] = load i8, ptr getelementptr (i8, ptr addrspacecast (ptr addrspace(1) @__omp_offloading_10302_b20a40e_main_l4_kernel_environment to ptr), i64 2), align 2
31-
; AMDGPU-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 2
32-
; AMDGPU-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0
33-
; AMDGPU-NEXT: [[TMP5:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x() #[[ATTR3:[0-9]+]]
34-
; AMDGPU-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
35-
; AMDGPU-NEXT: [[OR_COND:%.*]] = select i1 [[TMP4]], i1 [[TMP6]], i1 false
36-
; AMDGPU-NEXT: br i1 [[OR_COND]], label [[TMP7:%.*]], label [[TMP8:%.*]]
37-
; AMDGPU: 7:
38-
; AMDGPU-NEXT: store i8 0, ptr addrspace(3) null, align 2147483648
39-
; AMDGPU-NEXT: br label [[TMP8]]
30+
; AMDGPU-NEXT: [[TMP2:%.*]] = addrspacecast ptr getelementptr (i8, ptr addrspacecast (ptr addrspace(1) @__omp_offloading_10302_b20a40e_main_l4_kernel_environment to ptr), i64 2) to ptr addrspace(1)
31+
; AMDGPU-NEXT: [[TMP3:%.*]] = load i8, ptr addrspace(1) [[TMP2]], align 2
32+
; AMDGPU-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 2
33+
; AMDGPU-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0
34+
; AMDGPU-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x() #[[ATTR3:[0-9]+]]
35+
; AMDGPU-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
36+
; AMDGPU-NEXT: [[OR_COND:%.*]] = select i1 [[TMP5]], i1 [[TMP7]], i1 false
37+
; AMDGPU-NEXT: br i1 [[OR_COND]], label [[TMP8:%.*]], label [[TMP9:%.*]]
4038
; AMDGPU: 8:
41-
; AMDGPU-NEXT: br label [[TMP10:%.*]]
39+
; AMDGPU-NEXT: store i8 0, ptr addrspace(3) null, align 2147483648
40+
; AMDGPU-NEXT: br label [[TMP9]]
4241
; AMDGPU: 9:
43-
; AMDGPU-NEXT: unreachable
42+
; AMDGPU-NEXT: br label [[TMP11:%.*]]
4443
; AMDGPU: 10:
44+
; AMDGPU-NEXT: unreachable
45+
; AMDGPU: 11:
4546
; AMDGPU-NEXT: ret i32 0
4647
;
4748
%2 = getelementptr %struct.ConfigurationEnvironmentTy.8, ptr %0, i64 0, i32 2

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