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Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic"
This reverts commit 7912286.
1 parent 7912286 commit 5f3e565

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3 files changed

+12
-171
lines changed

3 files changed

+12
-171
lines changed

lld/ELF/Arch/PPC64.cpp

Lines changed: 12 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -727,38 +727,15 @@ void PPC64::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
727727
writeFromHalf16(loc, 0x3c6d0000); // addis r3, r13
728728
relocateNoSym(loc, R_PPC64_TPREL16_HA, val);
729729
break;
730-
case R_PPC64_GOT_TLSGD_PCREL34:
731-
// Relax from paddi r3, 0, x@got@tlsgd@pcrel, 1 to
732-
// paddi r3, r13, x@tprel, 0
733-
writePrefixedInstruction(loc, 0x06000000386d0000);
734-
relocateNoSym(loc, R_PPC64_TPREL34, val);
735-
break;
736-
case R_PPC64_TLSGD: {
737-
// PC Relative Relaxation:
738-
// Relax from bl __tls_get_addr@notoc(x@tlsgd) to
739-
// nop
740-
// TOC Relaxation:
741-
// Relax from bl __tls_get_addr(x@tlsgd)
742-
// nop
743-
// to
744-
// nop
745-
// addi r3, r3, x@tprel@l
746-
const uintptr_t locAsInt = reinterpret_cast<uintptr_t>(loc);
747-
if (locAsInt % 4 == 0) {
748-
write32(loc, NOP); // nop
749-
write32(loc + 4, 0x38630000); // addi r3, r3
750-
// Since we are relocating a half16 type relocation and Loc + 4 points to
751-
// the start of an instruction we need to advance the buffer by an extra
752-
// 2 bytes on BE.
753-
relocateNoSym(loc + 4 + (config->ekind == ELF64BEKind ? 2 : 0),
754-
R_PPC64_TPREL16_LO, val);
755-
} else if (locAsInt % 4 == 1) {
756-
write32(loc - 1, NOP);
757-
} else {
758-
errorOrWarn("R_PPC64_TLSGD has unexpected byte alignment");
759-
}
730+
case R_PPC64_TLSGD:
731+
write32(loc, NOP);
732+
write32(loc + 4, 0x38630000); // addi r3, r3
733+
// Since we are relocating a half16 type relocation and Loc + 4 points to
734+
// the start of an instruction we need to advance the buffer by an extra
735+
// 2 bytes on BE.
736+
relocateNoSym(loc + 4 + (config->ekind == ELF64BEKind ? 2 : 0),
737+
R_PPC64_TPREL16_LO, val);
760738
break;
761-
}
762739
default:
763740
llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
764741
}
@@ -970,8 +947,6 @@ RelExpr PPC64::getRelExpr(RelType type, const Symbol &s,
970947
case R_PPC64_GOT_TLSGD16_HI:
971948
case R_PPC64_GOT_TLSGD16_LO:
972949
return R_TLSGD_GOT;
973-
case R_PPC64_GOT_TLSGD_PCREL34:
974-
return R_TLSGD_PC;
975950
case R_PPC64_GOT_TLSLD16:
976951
case R_PPC64_GOT_TLSLD16_HA:
977952
case R_PPC64_GOT_TLSLD16_HI:
@@ -1286,7 +1261,6 @@ void PPC64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
12861261
break;
12871262
case R_PPC64_PCREL34:
12881263
case R_PPC64_GOT_PCREL34:
1289-
case R_PPC64_GOT_TLSGD_PCREL34:
12901264
case R_PPC64_GOT_TPREL_PCREL34:
12911265
case R_PPC64_TPREL34: {
12921266
const uint64_t si0Mask = 0x00000003ffff0000;
@@ -1366,8 +1340,7 @@ RelExpr PPC64::adjustRelaxExpr(RelType type, const uint8_t *data,
13661340
if ((readPrefixedInstruction(data) & 0xfc000000) == 0xe4000000)
13671341
return R_PPC64_RELAX_GOT_PC;
13681342
}
1369-
1370-
if (type != R_PPC64_GOT_TLSGD_PCREL34 && expr == R_RELAX_TLS_GD_TO_IE)
1343+
if (expr == R_RELAX_TLS_GD_TO_IE)
13711344
return R_RELAX_TLS_GD_TO_IE_GOT_OFF;
13721345
if (expr == R_RELAX_TLS_LD_TO_LE)
13731346
return R_RELAX_TLS_LD_TO_LE_ABS;
@@ -1408,35 +1381,10 @@ void PPC64::relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
14081381
relocateNoSym(loc, R_PPC64_GOT_TPREL16_LO_DS, val);
14091382
return;
14101383
}
1411-
case R_PPC64_GOT_TLSGD_PCREL34: {
1412-
// Relax from paddi r3, 0, sym@got@tlsgd@pcrel, 1 to
1413-
// pld r3, sym@got@tprel@pcrel
1414-
writePrefixedInstruction(loc, 0x04100000e4600000);
1415-
relocateNoSym(loc, R_PPC64_GOT_TPREL_PCREL34, val);
1416-
return;
1417-
}
1418-
case R_PPC64_TLSGD: {
1419-
// PC Relative Relaxation:
1420-
// Relax from bl __tls_get_addr@notoc(x@tlsgd) to
1421-
// nop
1422-
// TOC Relaxation:
1423-
// Relax from bl __tls_get_addr(x@tlsgd)
1424-
// nop
1425-
// to
1426-
// nop
1427-
// add r3, r3, r13
1428-
const uintptr_t locAsInt = reinterpret_cast<uintptr_t>(loc);
1429-
if (locAsInt % 4 == 0) {
1430-
write32(loc, NOP); // bl __tls_get_addr(sym@tlsgd) --> nop
1431-
write32(loc + 4, 0x7c636A14); // nop --> add r3, r3, r13
1432-
} else if (locAsInt % 4 == 1) {
1433-
// bl __tls_get_addr(sym@tlsgd) --> add r3, r3, r13
1434-
write32(loc - 1, 0x7c636a14);
1435-
} else {
1436-
errorOrWarn("R_PPC64_TLSGD has unexpected byte alignment");
1437-
}
1384+
case R_PPC64_TLSGD:
1385+
write32(loc, NOP); // bl __tls_get_addr(sym@tlsgd) --> nop
1386+
write32(loc + 4, 0x7c636A14); // nop --> add r3, r3, r13
14381387
return;
1439-
}
14401388
default:
14411389
llvm_unreachable("unsupported relocation for TLS GD to IE relaxation");
14421390
}

lld/ELF/Relocations.cpp

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1357,19 +1357,6 @@ static void scanReloc(InputSectionBase &sec, OffsetGetter &getOffset, RelTy *&i,
13571357
if (type == R_PPC64_TOC16_LO && sym.isSection() && isa<Defined>(sym) &&
13581358
cast<Defined>(sym).section->name == ".toc")
13591359
ppc64noTocRelax.insert({&sym, addend});
1360-
1361-
if (type == R_PPC64_TLSGD && expr == R_TLSDESC_CALL) {
1362-
if (i == end) {
1363-
errorOrWarn("R_PPC64_TLSGD may not be the last relocation" +
1364-
getLocation(sec, sym, offset));
1365-
return;
1366-
}
1367-
1368-
// Offset the 4-byte aligned R_PPC64_TLSGD by one byte in the NOTOC case,
1369-
// so we can discern it later from the toc-case.
1370-
if (i->getType(/*isMips64EL=*/false) == R_PPC64_REL24_NOTOC)
1371-
++offset;
1372-
}
13731360
}
13741361

13751362
// Relax relocations.

lld/test/ELF/ppc64-tls-pcrel-gd.s

Lines changed: 0 additions & 94 deletions
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