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[VectorCombine] Add support for zext/sext/trunc to shuffleToIdentity
This is one of the simple additions to shuffleToIdentity that help it look through intermediate zext/sext instructions. The other change here is the removal of a check that both operands of the original shuffle are instructions, which is a relic from a previous version.
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-50
lines changed

2 files changed

+23
-50
lines changed

‎llvm/lib/Transforms/Vectorize/VectorCombine.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1673,8 +1673,7 @@ bool VectorCombine::foldShuffleOfShuffles(Instruction &I) {
16731673
// do so.
16741674
bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
16751675
auto *Ty = dyn_cast<FixedVectorType>(I.getType());
1676-
if (!Ty || !isa<Instruction>(I.getOperand(0)) ||
1677-
!isa<Instruction>(I.getOperand(1)))
1676+
if (!Ty)
16781677
return false;
16791678

16801679
using InstLane = std::pair<Value *, int>;
@@ -1773,7 +1772,9 @@ bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
17731772
!cast<BinaryOperator>(Item[0].first)->isIntDivRem()) {
17741773
Worklist.push_back(GenerateInstLaneVectorFromOperand(Item, 0));
17751774
Worklist.push_back(GenerateInstLaneVectorFromOperand(Item, 1));
1776-
} else if (isa<UnaryOperator>(Item[0].first)) {
1775+
} else if (isa<UnaryOperator>(Item[0].first) ||
1776+
isa<TruncInst>(Item[0].first) || isa<ZExtInst>(Item[0].first) ||
1777+
isa<SExtInst>(Item[0].first)) {
17771778
Worklist.push_back(GenerateInstLaneVectorFromOperand(Item, 0));
17781779
} else if (auto *II = dyn_cast<IntrinsicInst>(Item[0].first);
17791780
II && isTriviallyVectorizable(II->getIntrinsicID())) {
@@ -1834,6 +1835,9 @@ bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
18341835
if (auto BI = dyn_cast<BinaryOperator>(I))
18351836
return Builder.CreateBinOp((Instruction::BinaryOps)BI->getOpcode(),
18361837
Ops[0], Ops[1]);
1838+
if (auto CI = dyn_cast<CastInst>(I))
1839+
return Builder.CreateCast((Instruction::CastOps)CI->getOpcode(), Ops[0],
1840+
DstTy);
18371841
if (II)
18381842
return Builder.CreateIntrinsic(DstTy, II->getIntrinsicID(), Ops);
18391843
assert(isa<UnaryInstruction>(I) &&

‎llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll

Lines changed: 16 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -432,19 +432,10 @@ define <8 x half> @fma(<8 x half> %a, <8 x half> %b, <8 x half> %c) {
432432

433433
define void @exttrunc(<8 x i32> %a, <8 x i32> %b, ptr %p) {
434434
; CHECK-LABEL: @exttrunc(
435-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i32> [[A:%.*]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
436-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
437-
; CHECK-NEXT: [[BB:%.*]] = shufflevector <8 x i32> [[B:%.*]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
438-
; CHECK-NEXT: [[BT:%.*]] = shufflevector <8 x i32> [[B]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
439-
; CHECK-NEXT: [[AB1:%.*]] = zext <4 x i32> [[AB]] to <4 x i64>
440-
; CHECK-NEXT: [[AT1:%.*]] = zext <4 x i32> [[AT]] to <4 x i64>
441-
; CHECK-NEXT: [[BB1:%.*]] = sext <4 x i32> [[BB]] to <4 x i64>
442-
; CHECK-NEXT: [[BT1:%.*]] = sext <4 x i32> [[BT]] to <4 x i64>
443-
; CHECK-NEXT: [[ABB:%.*]] = add <4 x i64> [[AB1]], [[BB1]]
444-
; CHECK-NEXT: [[ABT:%.*]] = add <4 x i64> [[AT1]], [[BT1]]
445-
; CHECK-NEXT: [[ABB1:%.*]] = trunc <4 x i64> [[ABB]] to <4 x i32>
446-
; CHECK-NEXT: [[ABT1:%.*]] = trunc <4 x i64> [[ABT]] to <4 x i32>
447-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB1]], <4 x i32> [[ABT1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
435+
; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i32> [[A:%.*]] to <8 x i64>
436+
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i32> [[B:%.*]] to <8 x i64>
437+
; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i64> [[TMP1]], [[TMP2]]
438+
; CHECK-NEXT: [[R:%.*]] = trunc <8 x i64> [[TMP3]] to <8 x i32>
448439
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
449440
; CHECK-NEXT: ret void
450441
;
@@ -467,17 +458,9 @@ define void @exttrunc(<8 x i32> %a, <8 x i32> %b, ptr %p) {
467458

468459
define void @zext(<8 x i16> %a, <8 x i16> %b, ptr %p) {
469460
; CHECK-LABEL: @zext(
470-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
471-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
472-
; CHECK-NEXT: [[BB:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
473-
; CHECK-NEXT: [[BT:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
474-
; CHECK-NEXT: [[AB1:%.*]] = zext <4 x i16> [[AB]] to <4 x i32>
475-
; CHECK-NEXT: [[AT1:%.*]] = zext <4 x i16> [[AT]] to <4 x i32>
476-
; CHECK-NEXT: [[BB1:%.*]] = zext <4 x i16> [[BB]] to <4 x i32>
477-
; CHECK-NEXT: [[BT1:%.*]] = zext <4 x i16> [[BT]] to <4 x i32>
478-
; CHECK-NEXT: [[ABB:%.*]] = add <4 x i32> [[AB1]], [[BB1]]
479-
; CHECK-NEXT: [[ABT:%.*]] = add <4 x i32> [[AT1]], [[BT1]]
480-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB]], <4 x i32> [[ABT]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
461+
; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i16> [[A:%.*]] to <8 x i32>
462+
; CHECK-NEXT: [[TMP2:%.*]] = zext <8 x i16> [[B:%.*]] to <8 x i32>
463+
; CHECK-NEXT: [[R:%.*]] = add <8 x i32> [[TMP1]], [[TMP2]]
481464
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
482465
; CHECK-NEXT: ret void
483466
;
@@ -498,17 +481,9 @@ define void @zext(<8 x i16> %a, <8 x i16> %b, ptr %p) {
498481

499482
define void @sext(<8 x i16> %a, <8 x i16> %b, ptr %p) {
500483
; CHECK-LABEL: @sext(
501-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
502-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
503-
; CHECK-NEXT: [[BB:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
504-
; CHECK-NEXT: [[BT:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
505-
; CHECK-NEXT: [[AB1:%.*]] = sext <4 x i16> [[AB]] to <4 x i32>
506-
; CHECK-NEXT: [[AT1:%.*]] = sext <4 x i16> [[AT]] to <4 x i32>
507-
; CHECK-NEXT: [[BB1:%.*]] = sext <4 x i16> [[BB]] to <4 x i32>
508-
; CHECK-NEXT: [[BT1:%.*]] = sext <4 x i16> [[BT]] to <4 x i32>
509-
; CHECK-NEXT: [[ABB:%.*]] = add <4 x i32> [[AB1]], [[BB1]]
510-
; CHECK-NEXT: [[ABT:%.*]] = add <4 x i32> [[AT1]], [[BT1]]
511-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB]], <4 x i32> [[ABT]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
484+
; CHECK-NEXT: [[TMP1:%.*]] = sext <8 x i16> [[A:%.*]] to <8 x i32>
485+
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i16> [[B:%.*]] to <8 x i32>
486+
; CHECK-NEXT: [[R:%.*]] = add <8 x i32> [[TMP1]], [[TMP2]]
512487
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
513488
; CHECK-NEXT: ret void
514489
;
@@ -567,11 +542,7 @@ define void @zext_types(<8 x i16> %a, <8 x i32> %b, ptr %p) {
567542

568543
define void @trunc(<8 x i64> %a, <8 x i64> %b, ptr %p) {
569544
; CHECK-LABEL: @trunc(
570-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i64> [[A:%.*]], <8 x i64> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
571-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i64> [[A]], <8 x i64> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
572-
; CHECK-NEXT: [[ABB1:%.*]] = trunc <4 x i64> [[AB]] to <4 x i32>
573-
; CHECK-NEXT: [[ABT1:%.*]] = trunc <4 x i64> [[AT]] to <4 x i32>
574-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB1]], <4 x i32> [[ABT1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
545+
; CHECK-NEXT: [[R:%.*]] = trunc <8 x i64> [[A:%.*]] to <8 x i32>
575546
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
576547
; CHECK-NEXT: ret void
577548
;
@@ -745,13 +716,11 @@ entry:
745716

746717
define <4 x i8> @singleop(<4 x i8> %a, <4 x i8> %b) {
747718
; CHECK-LABEL: @singleop(
748-
; CHECK-NEXT: [[A1:%.*]] = shufflevector <4 x i8> [[A:%.*]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
749-
; CHECK-NEXT: [[B1:%.*]] = shufflevector <4 x i8> [[B:%.*]], <4 x i8> poison, <4 x i32> zeroinitializer
750-
; CHECK-NEXT: [[A2:%.*]] = zext <4 x i8> [[A1]] to <4 x i16>
751-
; CHECK-NEXT: [[B2:%.*]] = zext <4 x i8> [[B1]] to <4 x i16>
752-
; CHECK-NEXT: [[AB:%.*]] = add <4 x i16> [[A2]], [[B2]]
753-
; CHECK-NEXT: [[T:%.*]] = trunc <4 x i16> [[AB]] to <4 x i8>
754-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i8> [[T]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
719+
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i8> [[B:%.*]], <4 x i8> poison, <4 x i32> zeroinitializer
720+
; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i8> [[A:%.*]] to <4 x i16>
721+
; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP1]] to <4 x i16>
722+
; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i16> [[TMP2]], [[TMP3]]
723+
; CHECK-NEXT: [[R:%.*]] = trunc <4 x i16> [[TMP4]] to <4 x i8>
755724
; CHECK-NEXT: ret <4 x i8> [[R]]
756725
;
757726
%a1 = shufflevector <4 x i8> %a, <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>

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