Skip to content

Commit 60a3b15

Browse files
[RISCV][GISEL] Add IRTranslation for insertelement with scalable vector type
1 parent c954986 commit 60a3b15

File tree

4 files changed

+1948
-6
lines changed

4 files changed

+1948
-6
lines changed

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2956,7 +2956,8 @@ bool IRTranslator::translateInsertElement(const User &U,
29562956
MachineIRBuilder &MIRBuilder) {
29572957
// If it is a <1 x Ty> vector, use the scalar as it is
29582958
// not a legal vector type in LLT.
2959-
if (cast<FixedVectorType>(U.getType())->getNumElements() == 1)
2959+
if (auto *FVT = dyn_cast<FixedVectorType>(U.getType());
2960+
FVT && FVT->getNumElements() == 1)
29602961
return translateCopy(U, *U.getOperand(1), MIRBuilder);
29612962

29622963
Register Res = getOrCreateVReg(U);

llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1282,8 +1282,8 @@ MachineIRBuilder::buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
12821282
SrcOps[1].getLLTTy(*getMRI()) &&
12831283
"Type mismatch");
12841284
assert(SrcOps[2].getLLTTy(*getMRI()).isScalar() && "Invalid index");
1285-
assert(DstOps[0].getLLTTy(*getMRI()).getNumElements() ==
1286-
SrcOps[0].getLLTTy(*getMRI()).getNumElements() &&
1285+
assert(DstOps[0].getLLTTy(*getMRI()).getElementCount() ==
1286+
SrcOps[0].getLLTTy(*getMRI()).getElementCount() &&
12871287
"Type mismatch");
12881288
break;
12891289
}

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20608,11 +20608,11 @@ unsigned RISCVTargetLowering::getCustomCtpopCost(EVT VT,
2060820608

2060920609
bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const {
2061020610

20611-
// GISel support is in progress or complete for G_ADD, G_SUB, G_AND, G_OR, and
20612-
// G_XOR.
20611+
// GISel support is in progress or complete for these opcodes.
2061320612
unsigned Op = Inst.getOpcode();
2061420613
if (Op == Instruction::Add || Op == Instruction::Sub ||
20615-
Op == Instruction::And || Op == Instruction::Or || Op == Instruction::Xor)
20614+
Op == Instruction::And || Op == Instruction::Or ||
20615+
Op == Instruction::Xor || Op == Instruction::InsertElement)
2061620616
return false;
2061720617

2061820618
if (Inst.getType()->isScalableTy())

0 commit comments

Comments
 (0)