Skip to content

Commit 616a443

Browse files
committed
static_cast
1 parent 3bb728d commit 616a443

File tree

2 files changed

+7
-1
lines changed

2 files changed

+7
-1
lines changed

llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2849,7 +2849,7 @@ void AsmPrinter::emitJumpTableSizesSection(const MachineJumpTableInfo *MJTI,
28492849

28502850
if (isElf) {
28512851
MCSymbolELF *LinkedToSym = dyn_cast<MCSymbolELF>(CurrentFnSym);
2852-
int Flags = F.hasComdat() ? (int)ELF::SHF_GROUP : 0;
2852+
int Flags = F.hasComdat() ? static_cast<int>(ELF::SHF_GROUP) : 0;
28532853

28542854
JumpTableSizesSection = OutContext.getELFSection(
28552855
sectionName, ELF::SHT_LLVM_JT_SIZES, Flags, 0, GroupName, F.hasComdat(),

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29986,8 +29986,14 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
2998629986
MVT::getVectorVT(NarrowScalarVT, WideNumElts), dl, AmtWideElts);
2998729987
AmtWide = DAG.getZExtOrTrunc(AmtWide, dl, WideVT);
2998829988
// Perform the actual shift.
29989+
<<<<<<< HEAD
2998929990
unsigned LogicalOpc = Opc == ISD::SRA ? ISD::SRL : Opc;
2999029991
SDValue ShiftedR = DAG.getNode(LogicalOpc, dl, WideVT, RWide, AmtWide);
29992+
=======
29993+
unsigned LogicalOpc =
29994+
Opc == ISD::SRA ? static_cast<unsigned>(ISD::SRL) : Opc;
29995+
SDValue ShiftedR = DAG.getNode(LogicalOpc, dl, VT16, R16, Amt16);
29996+
>>>>>>> ae2283c2c014 (static_cast)
2999129997
// Now we need to construct a mask which will "drop" bits that get
2999229998
// shifted past the LSB/MSB. For a logical shift left, it will look
2999329999
// like:

0 commit comments

Comments
 (0)