@@ -52,12 +52,11 @@ static cl::opt<bool> PrintSlotIndexes(
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cl::init(true ), cl::Hidden);
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MachineBasicBlock::MachineBasicBlock (MachineFunction &MF, const BasicBlock *B)
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- : BB(B), Number(-1 ), xParent(&MF),
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- TRI(MF.getSubtarget().getRegisterInfo()) {
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+ : BB(B), Number(-1 ), xParent(&MF) {
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Insts.Parent = this ;
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if (B)
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IrrLoopHeaderWeight = B->getIrrLoopHeaderWeight ();
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- LiveInRegUnits.resize (TRI ->getNumRegUnits ());
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+ LiveInRegUnits.resize (MF. getSubtarget (). getRegisterInfo () ->getNumRegUnits ());
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}
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MachineBasicBlock::~MachineBasicBlock () = default ;
@@ -601,6 +600,7 @@ void MachineBasicBlock::printAsOperand(raw_ostream &OS,
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}
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void MachineBasicBlock::addLiveInRegUnit (MCRegister Reg, LaneBitmask LaneMask) {
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+ const TargetRegisterInfo *TRI = getParent ()->getSubtarget ().getRegisterInfo ();
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for (MCRegUnitMaskIterator Unit (Reg, TRI); Unit.isValid (); ++Unit) {
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LaneBitmask UnitMask = (*Unit).second ;
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if ((UnitMask & LaneMask).any ())
@@ -630,11 +630,13 @@ MachineBasicBlock::removeLiveIn(MachineBasicBlock::livein_iterator I) {
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}
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void MachineBasicBlock::removeLiveInRegUnit (MCRegister Reg) {
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+ const TargetRegisterInfo *TRI = getParent ()->getSubtarget ().getRegisterInfo ();
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for (MCRegUnit Unit : TRI->regunits (Reg))
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LiveInRegUnits.reset (Unit);
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}
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bool MachineBasicBlock::isLiveIn (MCRegister Reg, LaneBitmask LaneMask) const {
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+ const TargetRegisterInfo *TRI = getParent ()->getSubtarget ().getRegisterInfo ();
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for (MCRegUnitMaskIterator Unit (Reg, TRI); Unit.isValid (); ++Unit) {
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LaneBitmask UnitMask = (*Unit).second ;
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if ((UnitMask & LaneMask).any () && LiveInRegUnits.test ((*Unit).first ))
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