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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s |
| 3 | + |
| 4 | +define i1 @test(i32 %g, i16 %d) { |
| 5 | +; CHECK-LABEL: define i1 @test( |
| 6 | +; CHECK-SAME: i32 [[G:%.*]], i16 [[D:%.*]]) { |
| 7 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 8 | +; CHECK-NEXT: [[TMP0:%.*]] = and i16 [[D]], 1 |
| 9 | +; CHECK-NEXT: [[XOR_I_I:%.*]] = xor i32 [[G]], 1 |
| 10 | +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[G]] to i8 |
| 11 | +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> poison, i8 [[TMP1]], i32 0 |
| 12 | +; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[XOR_I_I]] to i8 |
| 13 | +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i8> [[TMP2]], i8 [[TMP3]], i32 1 |
| 14 | +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x i8> [[TMP4]], <2 x i8> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1> |
| 15 | +; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i8> [[TMP5]], <i8 -9, i8 -9, i8 -1, i8 -1> |
| 16 | +; CHECK-NEXT: [[TMP7:%.*]] = icmp sgt <4 x i8> [[TMP6]], <i8 -3, i8 -3, i8 -3, i8 -3> |
| 17 | +; CHECK-NEXT: [[TMP8:%.*]] = zext <4 x i1> [[TMP7]] to <4 x i8> |
| 18 | +; CHECK-NEXT: [[TMP9:%.*]] = sext <2 x i8> [[TMP4]] to <2 x i32> |
| 19 | +; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x i32> [[TMP9]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1> |
| 20 | +; CHECK-NEXT: [[TMP11:%.*]] = zext <4 x i8> [[TMP8]] to <4 x i32> |
| 21 | +; CHECK-NEXT: [[TMP12:%.*]] = icmp sgt <4 x i32> [[TMP10]], [[TMP11]] |
| 22 | +; CHECK-NEXT: [[TMP13:%.*]] = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> [[TMP12]]) |
| 23 | +; CHECK-NEXT: ret i1 [[TMP13]] |
| 24 | +; |
| 25 | +entry: |
| 26 | + %0 = and i16 %d, 1 |
| 27 | + %xor.i.i = xor i32 %g, 1 |
| 28 | + %conv1.i.i = trunc i32 %xor.i.i to i8 |
| 29 | + %notsub.i = add i8 %conv1.i.i, -1 |
| 30 | + %cmp.i.i = icmp sgt i8 %notsub.i, -3 |
| 31 | + %conv3.i.i = zext i1 %cmp.i.i to i32 |
| 32 | + %cmp4.i.i = icmp sgt i32 %xor.i.i, %conv3.i.i |
| 33 | + %conv1.1.i.i = trunc i32 %g to i8 |
| 34 | + %notsub25.i = add i8 %conv1.1.i.i, -1 |
| 35 | + %cmp.1.i.i = icmp sgt i8 %notsub25.i, -3 |
| 36 | + %conv3.1.i.i = zext i1 %cmp.1.i.i to i32 |
| 37 | + %cmp4.1.i.i = icmp sgt i32 %g, %conv3.1.i.i |
| 38 | + %notsub26.i = add i8 %conv1.1.i.i, -9 |
| 39 | + %cmp.i17.i = icmp sgt i8 %notsub26.i, -3 |
| 40 | + %conv3.i18.i = zext i1 %cmp.i17.i to i32 |
| 41 | + %cmp4.i19.i = icmp sgt i32 %g, %conv3.i18.i |
| 42 | + %notsub27.i = add i8 %conv1.i.i, -9 |
| 43 | + %cmp.1.i22.i = icmp sgt i8 %notsub27.i, -3 |
| 44 | + %conv3.1.i23.i = zext i1 %cmp.1.i22.i to i32 |
| 45 | + %cmp4.1.i24.i = icmp sgt i32 %xor.i.i, %conv3.1.i23.i |
| 46 | + %1 = and i1 %cmp4.i19.i, %cmp4.1.i24.i |
| 47 | + %2 = and i1 %cmp4.i.i, %1 |
| 48 | + %3 = and i1 %cmp4.1.i.i, %2 |
| 49 | + ret i1 %3 |
| 50 | +} |
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