Use X86ISD::POP_FROM_X87_REG rather than ISD::CopyFromReg in call lowering

Author: MacDue

llvm/include/llvm/CodeGen/ISDOpcodes.h

@@ -1400,11 +1400,6 @@ enum NodeType {
   /// debugging purposes.
   FAKE_USE,
 
-  /// OutChain = CHAIN_BARRIER(InChain) marks that optimizations should not
-  /// optimize any users of a chain that contains a CHAIN_BARRIER to use a chain
-  /// from a point earlier than the CHAIN_BARRIER.
-  CHAIN_BARRIER,
-
   /// GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the
   /// beginning and end of GC transition  sequence, and carry arbitrary
   /// information that target might need for lowering.  The first operand is

llvm/include/llvm/CodeGen/SelectionDAGISel.h

@@ -472,7 +472,6 @@ class SelectionDAGISel {
   void Select_WRITE_REGISTER(SDNode *Op);
   void Select_UNDEF(SDNode *N);
   void Select_FAKE_USE(SDNode *N);
-  void Select_CHAIN_BARRIER(SDNode *N);
   void CannotYetSelect(SDNode *N);
 
   void Select_FREEZE(SDNode *N);

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

@@ -1182,14 +1182,6 @@ static void VerifySDNode(SDNode *N, const TargetLowering *TLI) {
     }
     break;
   }
-  case ISD::CHAIN_BARRIER: {
-    assert(N->getNumValues() == 1 && "Expected single result!");
-    assert(N->getNumOperands() == 1 && "Expected single operand!");
-    assert(N->getValueType(0) == MVT::Other &&
-           N->getOperand(0).getValueType() == MVT::Other &&
-           "Expected result and operand to be chains!");
-    break;
-  }
   }
 }
 #endif // NDEBUG
@@ -2624,18 +2616,6 @@ bool SelectionDAG::expandMultipleResultFPLibCall(
 
   auto [Call, CallChain] = TLI->LowerCallTo(CLI);
 
-  if (CallRetResNo && !Node->hasAnyUseOfValue(*CallRetResNo)) {
-    // This is needed for x87, which uses a floating-point stack. If (for
-    // example) the node to be expanded has two results one floating-point which
-    // is returned by the call, and one integer result, returned via an output
-    // pointer. If only the integer result is used then the `CopyFromReg` for
-    // the FP result may be optimized out. This prevents an FP stack pop from
-    // being emitted for it. The `CHAIN_BARRIER` node prevents optimizations
-    // from removing the `CopyFromReg` from the chain, and ensures the FP pop
-    // will be emitted.
-    CallChain = getNode(ISD::CHAIN_BARRIER, DL, MVT::Other, CallChain);
-  }
-
   for (auto [ResNo, ResultPtr] : llvm::enumerate(ResultPtrs)) {
     if (ResNo == CallRetResNo) {
       Results.push_back(Call);

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

@@ -462,8 +462,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
   case ISD::LIFETIME_END:               return "lifetime.end";
   case ISD::FAKE_USE:
     return "fake_use";
-  case ISD::CHAIN_BARRIER:
-    return "chain_barrier";
   case ISD::PSEUDO_PROBE:
     return "pseudoprobe";
   case ISD::GC_TRANSITION_START:        return "gc_transition.start";

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

@@ -2507,12 +2507,6 @@ void SelectionDAGISel::Select_FAKE_USE(SDNode *N) {
                        N->getOperand(1), N->getOperand(0));
 }
 
-void SelectionDAGISel::Select_CHAIN_BARRIER(SDNode *N) {
-  // CHAIN_BARRIER exists only for SDAG. Remove it before lowering to MIs.
-  CurDAG->ReplaceAllUsesWith(SDValue(N, 0), N->getOperand(0));
-  CurDAG->RemoveDeadNode(N);
-}
-
 void SelectionDAGISel::Select_FREEZE(SDNode *N) {
   // TODO: We don't have FREEZE pseudo-instruction in MachineInstr-level now.
   // If FREEZE instruction is added later, the code below must be changed as
@@ -3287,9 +3281,6 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
   case ISD::FAKE_USE:
     Select_FAKE_USE(NodeToMatch);
     return;
-  case ISD::CHAIN_BARRIER:
-    Select_CHAIN_BARRIER(NodeToMatch);
-    return;
   case ISD::FREEZE:
     Select_FREEZE(NodeToMatch);
     return;

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

@@ -6717,6 +6717,17 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
     ReplaceNode(Node, Res);
     return;
   }
+  case X86ISD::POP_FROM_X87_REG: {
+    SDValue Chain = Node->getOperand(0);
+    Register Reg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
+    SDValue Glue;
+    if (Node->getNumValues() == 3)
+      Glue = Node->getOperand(2);
+    SDValue Copy =
+        CurDAG->getCopyFromReg(Chain, dl, Reg, Node->getValueType(0), Glue);
+    ReplaceNode(Node, Copy.getNode());
+    return;
+  }
   }
 
   SelectCode(Node);

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -35113,6 +35113,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
   NODE_NAME_CASE(CVTTP2SIS_SAE)
   NODE_NAME_CASE(CVTTP2UIS)
   NODE_NAME_CASE(MCVTTP2UIS)
+  NODE_NAME_CASE(POP_FROM_X87_REG)
   }
   return nullptr;
 #undef NODE_NAME_CASE

llvm/lib/Target/X86/X86ISelLowering.h

@@ -81,6 +81,15 @@ namespace llvm {
     // marker instruction.
     CALL_RVMARKER,
 
+    /// The same as ISD::CopyFromReg except that this node makes it explicit
+    /// that it may lower to an x87 FPU stack pop. Optimizations should be more
+    /// cautious when handling this node than a normal CopyFromReg to avoid
+    /// removing a required FPU stack pop. A key requirement is optimizations
+    /// should not optimize any users of a chain that contains a
+    /// POP_FROM_X87_REG to use a chain from a point earlier than the
+    /// POP_FROM_X87_REG (which may remove a required FPU stack pop).
+    POP_FROM_X87_REG,
+
     /// X86 compare and logical compare instructions.
     CMP,
     FCMP,

llvm/lib/Target/X86/X86ISelLoweringCall.cpp

@@ -1095,6 +1095,15 @@ static SDValue lowerRegToMasks(const SDValue &ValArg, const EVT &ValVT,
   return DAG.getBitcast(ValVT, ValReturned);
 }
 
+static SDValue getPopFromX87Reg(SelectionDAG &DAG, SDValue Chain,
+                                const SDLoc &dl, Register Reg, EVT VT,
+                                SDValue Glue) {
+  SDVTList VTs = DAG.getVTList(VT, MVT::Other, MVT::Glue);
+  SDValue Ops[] = {Chain, DAG.getRegister(Reg, VT), Glue};
+  return DAG.getNode(X86ISD::POP_FROM_X87_REG, dl, VTs,
+                     ArrayRef(Ops, Glue.getNode() ? 3 : 2));
+}
+
 /// Lower the result values of a call into the
 /// appropriate copies out of appropriate physical registers.
 ///
@@ -1145,8 +1154,8 @@ SDValue X86TargetLowering::LowerCallResult(
     // If we prefer to use the value in xmm registers, copy it out as f80 and
     // use a truncate to move it from fp stack reg to xmm reg.
     bool RoundAfterCopy = false;
-    if ((VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) &&
-        isScalarFPTypeInSSEReg(VA.getValVT())) {
+    bool X87Result = VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1;
+    if (X87Result && isScalarFPTypeInSSEReg(VA.getValVT())) {
       if (!Subtarget.hasX87())
         report_fatal_error("X87 register return with X87 disabled");
       CopyVT = MVT::f80;
@@ -1160,8 +1169,12 @@ SDValue X86TargetLowering::LowerCallResult(
       Val =
           getv64i1Argument(VA, RVLocs[++I], Chain, DAG, dl, Subtarget, &InGlue);
     } else {
-      Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), CopyVT, InGlue)
-                  .getValue(1);
+      Chain =
+          X87Result
+              ? getPopFromX87Reg(DAG, Chain, dl, VA.getLocReg(), CopyVT, InGlue)
+                    .getValue(1)
+              : DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), CopyVT, InGlue)
+                    .getValue(1);
       Val = Chain.getValue(0);
       InGlue = Chain.getValue(2);
     }

llvm/lib/Target/X86/X86InstrFragments.td

@@ -210,6 +210,8 @@ def X86call_rvmarker  : SDNode<"X86ISD::CALL_RVMARKER",     SDT_X86Call,
                         [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
                          SDNPVariadic]>;
 
+def X86pop_from_x87_reg : SDNode<"X86ISD::POP_FROM_X87_REG", SDTypeProfile<0, 0, []>,
+                          [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
 
 def X86NoTrackCall : SDNode<"X86ISD::NT_CALL", SDT_X86Call,
                             [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,