Skip to content

Commit 65df696

Browse files
nikicnikic
committed
[ConstraintElim] Add tests for signed induction variables (NFC)
1 parent a776740 commit 65df696

File tree

1 file changed

+297
-0
lines changed

1 file changed

+297
-0
lines changed

‎llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll

Lines changed: 297 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,297 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2+
; RUN: opt -S -passes=constraint-elimination < %s | FileCheck %s
3+
4+
declare void @use(i1)
5+
6+
define void @signed_iv_step_1(i64 %end) {
7+
; CHECK-LABEL: define void @signed_iv_step_1(
8+
; CHECK-SAME: i64 [[END:%.*]]) {
9+
; CHECK-NEXT: entry:
10+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sge i64 [[END]], -10
11+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
12+
; CHECK: loop:
13+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ -10, [[ENTRY:%.*]] ]
14+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
15+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
16+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
17+
; CHECK: loop.latch:
18+
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[IV]], [[END]]
19+
; CHECK-NEXT: call void @use(i1 [[CMP2]])
20+
; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i64 [[IV]], -10
21+
; CHECK-NEXT: call void @use(i1 [[CMP3]])
22+
; CHECK-NEXT: br label [[LOOP]]
23+
; CHECK: exit:
24+
; CHECK-NEXT: ret void
25+
;
26+
entry:
27+
%precond = icmp sge i64 %end, -10
28+
br i1 %precond, label %loop, label %exit
29+
30+
loop:
31+
%iv = phi i64 [ %iv.next, %loop.latch ], [ -10, %entry ]
32+
%iv.next = add i64 %iv, 1
33+
%cmp.i.not = icmp eq i64 %iv, %end
34+
br i1 %cmp.i.not, label %exit, label %loop.latch
35+
36+
loop.latch:
37+
%cmp2 = icmp slt i64 %iv, %end
38+
call void @use(i1 %cmp2)
39+
%cmp3 = icmp sge i64 %iv, -10
40+
call void @use(i1 %cmp3)
41+
br label %loop
42+
43+
exit:
44+
ret void
45+
}
46+
47+
define void @signed_iv_step_4(i64 %count) {
48+
; CHECK-LABEL: define void @signed_iv_step_4(
49+
; CHECK-SAME: i64 [[COUNT:%.*]]) {
50+
; CHECK-NEXT: entry:
51+
; CHECK-NEXT: [[END:%.*]] = shl nsw i64 [[COUNT]], 2
52+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], -1
53+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
54+
; CHECK: loop:
55+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
56+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
57+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
58+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
59+
; CHECK: loop.latch:
60+
; CHECK-NEXT: call void @use(i1 true)
61+
; CHECK-NEXT: call void @use(i1 true)
62+
; CHECK-NEXT: br label [[LOOP]]
63+
; CHECK: exit:
64+
; CHECK-NEXT: ret void
65+
;
66+
entry:
67+
%end = shl nsw i64 %count, 2
68+
%precond = icmp sgt i64 %count, -1
69+
br i1 %precond, label %loop, label %exit
70+
71+
loop:
72+
%iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]
73+
%iv.next = add i64 %iv, 4
74+
%cmp.i.not = icmp eq i64 %iv, %end
75+
br i1 %cmp.i.not, label %exit, label %loop.latch
76+
77+
loop.latch:
78+
%cmp2 = icmp slt i64 %iv, %end
79+
call void @use(i1 %cmp2)
80+
%cmp3 = icmp sge i64 %iv, 0
81+
call void @use(i1 %cmp3)
82+
br label %loop
83+
84+
exit:
85+
ret void
86+
}
87+
88+
define void @signed_iv_step_4_missing_precond(i64 %count) {
89+
; CHECK-LABEL: define void @signed_iv_step_4_missing_precond(
90+
; CHECK-SAME: i64 [[COUNT:%.*]]) {
91+
; CHECK-NEXT: entry:
92+
; CHECK-NEXT: [[END:%.*]] = shl i64 [[COUNT]], 2
93+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], -1
94+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
95+
; CHECK: loop:
96+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
97+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
98+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
99+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
100+
; CHECK: loop.latch:
101+
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[IV]], [[END]]
102+
; CHECK-NEXT: call void @use(i1 [[CMP2]])
103+
; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i64 [[IV]], 0
104+
; CHECK-NEXT: call void @use(i1 [[CMP3]])
105+
; CHECK-NEXT: br label [[LOOP]]
106+
; CHECK: exit:
107+
; CHECK-NEXT: ret void
108+
;
109+
entry:
110+
%end = shl i64 %count, 2
111+
%precond = icmp sgt i64 %count, -1
112+
br i1 %precond, label %loop, label %exit
113+
114+
loop:
115+
%iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ]
116+
%iv.next = add i64 %iv, 4
117+
%cmp.i.not = icmp eq i64 %iv, %end
118+
br i1 %cmp.i.not, label %exit, label %loop.latch
119+
120+
loop.latch:
121+
%cmp2 = icmp slt i64 %iv, %end
122+
call void @use(i1 %cmp2)
123+
%cmp3 = icmp sge i64 %iv, 0
124+
call void @use(i1 %cmp3)
125+
br label %loop
126+
127+
exit:
128+
ret void
129+
}
130+
131+
define void @signed_iv_step_4_start_4(i64 %count) {
132+
; CHECK-LABEL: define void @signed_iv_step_4_start_4(
133+
; CHECK-SAME: i64 [[COUNT:%.*]]) {
134+
; CHECK-NEXT: entry:
135+
; CHECK-NEXT: [[END:%.*]] = shl nsw i64 [[COUNT]], 2
136+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], 0
137+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
138+
; CHECK: loop:
139+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 4, [[ENTRY:%.*]] ]
140+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
141+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
142+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
143+
; CHECK: loop.latch:
144+
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[IV]], [[END]]
145+
; CHECK-NEXT: call void @use(i1 [[CMP2]])
146+
; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i64 [[IV]], 4
147+
; CHECK-NEXT: call void @use(i1 [[CMP3]])
148+
; CHECK-NEXT: br label [[LOOP]]
149+
; CHECK: exit:
150+
; CHECK-NEXT: ret void
151+
;
152+
entry:
153+
%end = shl nsw i64 %count, 2
154+
%precond = icmp sgt i64 %count, 0
155+
br i1 %precond, label %loop, label %exit
156+
157+
loop:
158+
%iv = phi i64 [ %iv.next, %loop.latch ], [ 4, %entry ]
159+
%iv.next = add i64 %iv, 4
160+
%cmp.i.not = icmp eq i64 %iv, %end
161+
br i1 %cmp.i.not, label %exit, label %loop.latch
162+
163+
loop.latch:
164+
%cmp2 = icmp slt i64 %iv, %end
165+
call void @use(i1 %cmp2)
166+
%cmp3 = icmp sge i64 %iv, 4
167+
call void @use(i1 %cmp3)
168+
br label %loop
169+
170+
exit:
171+
ret void
172+
}
173+
174+
define void @signed_iv_step_4_start_4_missing_precond(i64 %count) {
175+
; CHECK-LABEL: define void @signed_iv_step_4_start_4_missing_precond(
176+
; CHECK-SAME: i64 [[COUNT:%.*]]) {
177+
; CHECK-NEXT: entry:
178+
; CHECK-NEXT: [[END:%.*]] = shl nsw i64 [[COUNT]], 2
179+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[COUNT]], -1
180+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
181+
; CHECK: loop:
182+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 4, [[ENTRY:%.*]] ]
183+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 4
184+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
185+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
186+
; CHECK: loop.latch:
187+
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 [[IV]], [[END]]
188+
; CHECK-NEXT: call void @use(i1 [[CMP2]])
189+
; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i64 [[IV]], 4
190+
; CHECK-NEXT: call void @use(i1 [[CMP3]])
191+
; CHECK-NEXT: br label [[LOOP]]
192+
; CHECK: exit:
193+
; CHECK-NEXT: ret void
194+
;
195+
entry:
196+
%end = shl nsw i64 %count, 2
197+
%precond = icmp sgt i64 %count, -1
198+
br i1 %precond, label %loop, label %exit
199+
200+
loop:
201+
%iv = phi i64 [ %iv.next, %loop.latch ], [ 4, %entry ]
202+
%iv.next = add i64 %iv, 4
203+
%cmp.i.not = icmp eq i64 %iv, %end
204+
br i1 %cmp.i.not, label %exit, label %loop.latch
205+
206+
loop.latch:
207+
%cmp2 = icmp slt i64 %iv, %end
208+
call void @use(i1 %cmp2)
209+
%cmp3 = icmp sge i64 %iv, 4
210+
call void @use(i1 %cmp3)
211+
br label %loop
212+
213+
exit:
214+
ret void
215+
}
216+
217+
define void @signed_iv_step_minus1(i64 %end) {
218+
; CHECK-LABEL: define void @signed_iv_step_minus1(
219+
; CHECK-SAME: i64 [[END:%.*]]) {
220+
; CHECK-NEXT: entry:
221+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sle i64 [[END]], 10
222+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
223+
; CHECK: loop:
224+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 10, [[ENTRY:%.*]] ]
225+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], -1
226+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
227+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
228+
; CHECK: loop.latch:
229+
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[IV]], [[END]]
230+
; CHECK-NEXT: call void @use(i1 [[CMP2]])
231+
; CHECK-NEXT: [[CMP3:%.*]] = icmp sle i64 [[IV]], 10
232+
; CHECK-NEXT: call void @use(i1 [[CMP3]])
233+
; CHECK-NEXT: br label [[LOOP]]
234+
; CHECK: exit:
235+
; CHECK-NEXT: ret void
236+
;
237+
entry:
238+
%precond = icmp sle i64 %end, 10
239+
br i1 %precond, label %loop, label %exit
240+
241+
loop:
242+
%iv = phi i64 [ %iv.next, %loop.latch ], [ 10, %entry ]
243+
%iv.next = add i64 %iv, -1
244+
%cmp.i.not = icmp eq i64 %iv, %end
245+
br i1 %cmp.i.not, label %exit, label %loop.latch
246+
247+
loop.latch:
248+
%cmp2 = icmp sgt i64 %iv, %end
249+
call void @use(i1 %cmp2)
250+
%cmp3 = icmp sle i64 %iv, 10
251+
call void @use(i1 %cmp3)
252+
br label %loop
253+
254+
exit:
255+
ret void
256+
}
257+
258+
define void @signed_iv_step_minus1_missing_precond(i64 %end) {
259+
; CHECK-LABEL: define void @signed_iv_step_minus1_missing_precond(
260+
; CHECK-SAME: i64 [[END:%.*]]) {
261+
; CHECK-NEXT: entry:
262+
; CHECK-NEXT: [[PRECOND:%.*]] = icmp sle i64 [[END]], 11
263+
; CHECK-NEXT: br i1 [[PRECOND]], label [[LOOP:%.*]], label [[EXIT:%.*]]
264+
; CHECK: loop:
265+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 10, [[ENTRY:%.*]] ]
266+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], -1
267+
; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i64 [[IV]], [[END]]
268+
; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT]], label [[LOOP_LATCH]]
269+
; CHECK: loop.latch:
270+
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i64 [[IV]], [[END]]
271+
; CHECK-NEXT: call void @use(i1 [[CMP2]])
272+
; CHECK-NEXT: [[CMP3:%.*]] = icmp sle i64 [[IV]], 10
273+
; CHECK-NEXT: call void @use(i1 [[CMP3]])
274+
; CHECK-NEXT: br label [[LOOP]]
275+
; CHECK: exit:
276+
; CHECK-NEXT: ret void
277+
;
278+
entry:
279+
%precond = icmp sle i64 %end, 11
280+
br i1 %precond, label %loop, label %exit
281+
282+
loop:
283+
%iv = phi i64 [ %iv.next, %loop.latch ], [ 10, %entry ]
284+
%iv.next = add i64 %iv, -1
285+
%cmp.i.not = icmp eq i64 %iv, %end
286+
br i1 %cmp.i.not, label %exit, label %loop.latch
287+
288+
loop.latch:
289+
%cmp2 = icmp sgt i64 %iv, %end
290+
call void @use(i1 %cmp2)
291+
%cmp3 = icmp sle i64 %iv, 10
292+
call void @use(i1 %cmp3)
293+
br label %loop
294+
295+
exit:
296+
ret void
297+
}

0 commit comments

Comments
 (0)