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[AMDGPU] Do not bother adding reserved registers to liveins (#79436)
Tweak the implementation of llvm.amdgcn.wave.id to not add TTMP8 to the function liveins.
1 parent 8ff16f6 commit 66c710e

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2 files changed

+2
-5
lines changed

2 files changed

+2
-5
lines changed

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6890,9 +6890,7 @@ bool AMDGPULegalizerInfo::legalizeWaveID(MachineInstr &MI,
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return false;
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LLT S32 = LLT::scalar(32);
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Register DstReg = MI.getOperand(0).getReg();
6893-
Register TTMP8 =
6894-
getFunctionLiveInPhysReg(B.getMF(), B.getTII(), AMDGPU::TTMP8,
6895-
AMDGPU::SReg_32RegClass, B.getDebugLoc(), S32);
6893+
auto TTMP8 = B.buildCopy(S32, Register(AMDGPU::TTMP8));
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auto LSB = B.buildConstant(S32, 25);
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auto Width = B.buildConstant(S32, 5);
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B.buildUbfx(DstReg, TTMP8, LSB, Width);

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7927,8 +7927,7 @@ SDValue SITargetLowering::lowerWaveID(SelectionDAG &DAG, SDValue Op) const {
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return {};
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SDLoc SL(Op);
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MVT VT = MVT::i32;
7930-
SDValue TTMP8 = CreateLiveInRegister(DAG, &AMDGPU::SReg_32RegClass,
7931-
AMDGPU::TTMP8, VT, SL);
7930+
SDValue TTMP8 = DAG.getCopyFromReg(DAG.getEntryNode(), SL, AMDGPU::TTMP8, VT);
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return DAG.getNode(AMDGPUISD::BFE_U32, SL, VT, TTMP8,
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DAG.getConstant(25, SL, VT), DAG.getConstant(5, SL, VT));
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}

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