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[Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemset to Align
This patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Differential Revision: https://reviews.llvm.org/D82851
1 parent 2723a9d commit 6a6af30

12 files changed

+41
-37
lines changed

‎llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ class SelectionDAGTargetInfo {
8080
virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
8181
SDValue Chain, SDValue Op1,
8282
SDValue Op2, SDValue Op3,
83-
unsigned Align, bool isVolatile,
83+
Align Alignment, bool isVolatile,
8484
MachinePointerInfo DstPtrInfo) const {
8585
return SDValue();
8686
}

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6627,7 +6627,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst,
66276627
// code. If the target chooses to do this, this is the next best.
66286628
if (TSI) {
66296629
SDValue Result = TSI->EmitTargetCodeForMemset(
6630-
*this, dl, Chain, Dst, Src, Size, Alignment.value(), isVol, DstPtrInfo);
6630+
*this, dl, Chain, Dst, Src, Size, Alignment, isVol, DstPtrInfo);
66316631
if (Result.getNode())
66326632
return Result;
66336633
}

‎llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ using namespace llvm;
1717

1818
SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemset(
1919
SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
20-
SDValue Size, unsigned Align, bool isVolatile,
20+
SDValue Size, Align Alignment, bool isVolatile,
2121
MachinePointerInfo DstPtrInfo) const {
2222
// Check to see if there is a specialized entry-point for memory zeroing.
2323
ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);

‎llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,8 @@ class AArch64SelectionDAGInfo : public SelectionDAGTargetInfo {
2121
public:
2222
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
2323
SDValue Chain, SDValue Dst, SDValue Src,
24-
SDValue Size, unsigned Align, bool isVolatile,
24+
SDValue Size, Align Alignment,
25+
bool isVolatile,
2526
MachinePointerInfo DstPtrInfo) const override;
2627
SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, const SDLoc &dl,
2728
SDValue Chain, SDValue Op1, SDValue Op2,

‎llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -248,8 +248,8 @@ SDValue ARMSelectionDAGInfo::EmitTargetCodeForMemmove(
248248

249249
SDValue ARMSelectionDAGInfo::EmitTargetCodeForMemset(
250250
SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
251-
SDValue Size, unsigned Align, bool isVolatile,
251+
SDValue Size, Align Alignment, bool isVolatile,
252252
MachinePointerInfo DstPtrInfo) const {
253-
return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size, Align,
254-
RTLIB::MEMSET);
253+
return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size,
254+
Alignment.value(), RTLIB::MEMSET);
255255
}

‎llvm/lib/Target/ARM/ARMSelectionDAGInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ class ARMSelectionDAGInfo : public SelectionDAGTargetInfo {
5454
// Adjust parameters for memset, see RTABI section 4.3.4
5555
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
5656
SDValue Chain, SDValue Op1, SDValue Op2,
57-
SDValue Op3, unsigned Align, bool isVolatile,
57+
SDValue Op3, Align Alignment, bool isVolatile,
5858
MachinePointerInfo DstPtrInfo) const override;
5959

6060
SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl,

‎llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
7474

7575
SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemset(
7676
SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst,
77-
SDValue Byte, SDValue Size, unsigned Align, bool IsVolatile,
77+
SDValue Byte, SDValue Size, Align Alignment, bool IsVolatile,
7878
MachinePointerInfo DstPtrInfo) const {
7979
EVT PtrVT = Dst.getValueType();
8080

@@ -97,20 +97,22 @@ SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemset(
9797
unsigned Size1 = Bytes == 16 ? 8 : 1 << findLastSet(Bytes);
9898
unsigned Size2 = Bytes - Size1;
9999
SDValue Chain1 = memsetStore(DAG, DL, Chain, Dst, ByteVal, Size1,
100-
Align, DstPtrInfo);
100+
Alignment.value(), DstPtrInfo);
101101
if (Size2 == 0)
102102
return Chain1;
103103
Dst = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
104104
DAG.getConstant(Size1, DL, PtrVT));
105105
DstPtrInfo = DstPtrInfo.getWithOffset(Size1);
106-
SDValue Chain2 = memsetStore(DAG, DL, Chain, Dst, ByteVal, Size2,
107-
std::min(Align, Size1), DstPtrInfo);
106+
SDValue Chain2 = memsetStore(
107+
DAG, DL, Chain, Dst, ByteVal, Size2,
108+
std::min((unsigned)Alignment.value(), Size1), DstPtrInfo);
108109
return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
109110
}
110111
} else {
111112
// Handle one and two bytes using STC.
112113
if (Bytes <= 2) {
113-
SDValue Chain1 = DAG.getStore(Chain, DL, Byte, Dst, DstPtrInfo, Align);
114+
SDValue Chain1 =
115+
DAG.getStore(Chain, DL, Byte, Dst, DstPtrInfo, Alignment);
114116
if (Bytes == 1)
115117
return Chain1;
116118
SDValue Dst2 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
@@ -131,7 +133,7 @@ SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemset(
131133

132134
// Copy the byte to the first location and then use MVC to copy
133135
// it to the rest.
134-
Chain = DAG.getStore(Chain, DL, Byte, Dst, DstPtrInfo, Align);
136+
Chain = DAG.getStore(Chain, DL, Byte, Dst, DstPtrInfo, Alignment);
135137
SDValue DstPlus1 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
136138
DAG.getConstant(1, DL, PtrVT));
137139
return emitMemMem(DAG, DL, SystemZISD::MVC, SystemZISD::MVC_LOOP,

‎llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,8 @@ class SystemZSelectionDAGInfo : public SelectionDAGTargetInfo {
3232

3333
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL,
3434
SDValue Chain, SDValue Dst, SDValue Byte,
35-
SDValue Size, unsigned Align, bool IsVolatile,
35+
SDValue Size, Align Alignment,
36+
bool IsVolatile,
3637
MachinePointerInfo DstPtrInfo) const override;
3738

3839
std::pair<SDValue, SDValue>

‎llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemmove(
4444

4545
SDValue WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset(
4646
SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Val,
47-
SDValue Size, unsigned Align, bool IsVolatile,
47+
SDValue Size, Align Alignment, bool IsVolatile,
4848
MachinePointerInfo DstPtrInfo) const {
4949
if (!DAG.getMachineFunction()
5050
.getSubtarget<WebAssemblySubtarget>()

‎llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ class WebAssemblySelectionDAGInfo final : public SelectionDAGTargetInfo {
3535
MachinePointerInfo SrcPtrInfo) const override;
3636
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL,
3737
SDValue Chain, SDValue Op1, SDValue Op2,
38-
SDValue Op3, unsigned Align, bool IsVolatile,
38+
SDValue Op3, Align Alignment, bool IsVolatile,
3939
MachinePointerInfo DstPtrInfo) const override;
4040
};
4141

‎llvm/lib/Target/X86/X86SelectionDAGInfo.cpp

Lines changed: 18 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ bool X86SelectionDAGInfo::isBaseRegConflictPossible(
4646

4747
SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
4848
SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Val,
49-
SDValue Size, unsigned Align, bool isVolatile,
49+
SDValue Size, Align Alignment, bool isVolatile,
5050
MachinePointerInfo DstPtrInfo) const {
5151
ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
5252
const X86Subtarget &Subtarget =
@@ -66,7 +66,7 @@ SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
6666
// If not DWORD aligned or size is more than the threshold, call the library.
6767
// The libc version is likely to be faster for these cases. It can use the
6868
// address value and run time information about the CPU.
69-
if ((Align & 3) != 0 || !ConstantSize ||
69+
if (Alignment < Align(4) || !ConstantSize ||
7070
ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
7171
// Check to see if there is a specialized entry-point for memory zeroing.
7272
ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Val);
@@ -112,28 +112,27 @@ SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
112112
uint64_t Val = ValC->getZExtValue() & 255;
113113

114114
// If the value is a constant, then we can potentially use larger sets.
115-
switch (Align & 3) {
116-
case 2: // WORD aligned
117-
AVT = MVT::i16;
118-
ValReg = X86::AX;
119-
Val = (Val << 8) | Val;
120-
break;
121-
case 0: // DWORD aligned
115+
if (Alignment > Align(2)) {
116+
// DWORD aligned
122117
AVT = MVT::i32;
123118
ValReg = X86::EAX;
124119
Val = (Val << 8) | Val;
125120
Val = (Val << 16) | Val;
126-
if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
121+
if (Subtarget.is64Bit() && Alignment > Align(8)) { // QWORD aligned
127122
AVT = MVT::i64;
128123
ValReg = X86::RAX;
129124
Val = (Val << 32) | Val;
130125
}
131-
break;
132-
default: // Byte aligned
126+
} else if (Alignment == Align(2)) {
127+
// WORD aligned
128+
AVT = MVT::i16;
129+
ValReg = X86::AX;
130+
Val = (Val << 8) | Val;
131+
} else {
132+
// Byte aligned
133133
AVT = MVT::i8;
134134
ValReg = X86::AL;
135135
Count = DAG.getIntPtrConstant(SizeVal, dl);
136-
break;
137136
}
138137

139138
if (AVT.bitsGT(MVT::i8)) {
@@ -170,12 +169,12 @@ SDValue X86SelectionDAGInfo::EmitTargetCodeForMemset(
170169
EVT AddrVT = Dst.getValueType();
171170
EVT SizeVT = Size.getValueType();
172171

173-
Chain = DAG.getMemset(Chain, dl,
174-
DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
175-
DAG.getConstant(Offset, dl, AddrVT)),
176-
Val, DAG.getConstant(BytesLeft, dl, SizeVT),
177-
llvm::Align(Align), isVolatile, false,
178-
DstPtrInfo.getWithOffset(Offset));
172+
Chain =
173+
DAG.getMemset(Chain, dl,
174+
DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
175+
DAG.getConstant(Offset, dl, AddrVT)),
176+
Val, DAG.getConstant(BytesLeft, dl, SizeVT), Alignment,
177+
isVolatile, false, DstPtrInfo.getWithOffset(Offset));
179178
}
180179

181180
// TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.

‎llvm/lib/Target/X86/X86SelectionDAGInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,8 @@ class X86SelectionDAGInfo : public SelectionDAGTargetInfo {
2828

2929
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
3030
SDValue Chain, SDValue Dst, SDValue Src,
31-
SDValue Size, unsigned Align, bool isVolatile,
31+
SDValue Size, Align Alignment,
32+
bool isVolatile,
3233
MachinePointerInfo DstPtrInfo) const override;
3334

3435
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,

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