@@ -410,8 +410,8 @@ added in the future:
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calling convention: on most platforms, they are not preserved and need to
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be saved by the caller, but on Windows, xmm6-xmm15 are preserved.
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- - On AArch64 the callee preserve all general purpose registers, except X0-X8
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- and X16-X18.
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+ - On AArch64 the callee preserve all general purpose registers, except
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+ X0-X8 and X16-X18. Not allowed with ``nest`` .
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The idea behind this convention is to support calls to runtime functions
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that have a hot path and a cold path. The hot path is usually a small piece
@@ -447,9 +447,9 @@ added in the future:
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R11. R11 can be used as a scratch register. Furthermore it also preserves
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all floating-point registers (XMMs/YMMs).
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- - On AArch64 the callee preserve all general purpose registers, except X0-X8
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- and X16-X18. Furthermore it also preserves lower 128 bits of V8-V31 SIMD -
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- floating point registers.
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+ - On AArch64 the callee preserve all general purpose registers, except
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+ X0-X8 and X16-X18. Furthermore it also preserves lower 128 bits of V8-V31
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+ SIMD floating point registers. Not allowed with ``nest`` .
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The idea behind this convention is to support calls to runtime functions
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that don't need to call out to any other functions.
@@ -21130,7 +21130,12 @@ sufficiently aligned block of memory; this memory is written to by the
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intrinsic. Note that the size and the alignment are target-specific -
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LLVM currently provides no portable way of determining them, so a
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front-end that generates this intrinsic needs to have some
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- target-specific knowledge. The ``func`` argument must hold a function.
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+ target-specific knowledge.
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+
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+ The ``func`` argument must be a constant (potentially bitcasted) pointer to a
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+ function declaration or definition, since the calling convention may affect the
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+ content of the trampoline that is created.
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+
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Semantics:
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""""""""""
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