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1 parent 6946ef5 commit 70d6a0aCopy full SHA for 70d6a0a
clang/lib/AST/Interp/Interp.h
@@ -187,10 +187,15 @@ template <typename T>
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bool CheckDivRem(InterpState &S, CodePtr OpPC, const T &LHS, const T &RHS) {
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if (RHS.isZero()) {
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const auto *Op = cast<BinaryOperator>(S.Current->getExpr(OpPC));
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+ if constexpr (std::is_same_v<T, Floating>) {
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+ S.CCEDiag(Op, diag::note_expr_divide_by_zero)
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+ << Op->getRHS()->getSourceRange();
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+ return true;
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+ }
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+
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S.FFDiag(Op, diag::note_expr_divide_by_zero)
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<< Op->getRHS()->getSourceRange();
- if constexpr (!std::is_same_v<T, Floating>)
- return false;
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+ return false;
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}
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if (LHS.isSigned() && LHS.isMin() && RHS.isNegative() && RHS.isMinusOne()) {
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