16
16
; ASM-NEXT: nop
17
17
; ASM-NEXT: nop
18
18
; ASM-NEXT: nop
19
- ; ASM-NEXT: movl $12345678, %eax
19
+ ; ASM-NEXT: movl $12345678, %ecx
20
20
; ASM-LABEL: .Lcfi_func_end0:
21
21
; ASM-NEXT: .size __cfi_f1, .Lcfi_func_end0-__cfi_f1
22
22
define void @f1 (ptr noundef %x ) !kcfi_type !1 {
@@ -90,7 +90,7 @@ define void @f4(ptr noundef %x) #0 {
90
90
91
91
;; Ensure we emit Value + 1 for unwanted values (e.g. endbr64 == 4196274163).
92
92
; ASM-LABEL: __cfi_f5:
93
- ; ASM: movl $4196274164, %eax # imm = 0xFA1E0FF4
93
+ ; ASM: movl $4196274164, %ecx # imm = 0xFA1E0FF4
94
94
define void @f5 (ptr noundef %x ) !kcfi_type !2 {
95
95
; ASM-LABEL: f5:
96
96
; ASM: movl $98693132, %r10d # imm = 0x5E1F00C
@@ -100,7 +100,7 @@ define void @f5(ptr noundef %x) !kcfi_type !2 {
100
100
101
101
;; Ensure we emit Value + 1 for unwanted values (e.g. -endbr64 == 98693133).
102
102
; ASM-LABEL: __cfi_f6:
103
- ; ASM: movl $98693134, %eax # imm = 0x5E1F00E
103
+ ; ASM: movl $98693134, %ecx # imm = 0x5E1F00E
104
104
define void @f6 (ptr noundef %x ) !kcfi_type !3 {
105
105
; ASM-LABEL: f6:
106
106
; ASM: movl $4196274162, %r10d # imm = 0xFA1E0FF2
@@ -138,10 +138,67 @@ define void @f8() {
138
138
ret void
139
139
}
140
140
141
+ %struct.S9 = type { [10 x i64 ] }
142
+
143
+ ;; Ensure that functions with large (e.g., greater than 8 bytes) arguments passed on the stack are assigned arity=7
144
+ ; ASM-LABEL: __cfi_f9:
145
+ ; ASM: movl $199571451, %edi # imm = 0xBE537FB
146
+ define dso_local void @f9 (ptr noundef byval (%struct.S9 ) align 8 %s ) !kcfi_type !4 {
147
+ entry:
148
+ ret void
149
+ }
150
+
151
+ ;; Ensure that functions with fewer than 7 register arguments and no stack arguments are assigned arity<7
152
+ ; ASM-LABEL: __cfi_f10:
153
+ ; ASM: movl $1046421190, %esi # imm = 0x3E5F1EC6
154
+ define dso_local void @f10 (i32 noundef %v1 , i32 noundef %v2 , i32 noundef %v3 , i32 noundef %v4 , i32 noundef %v5 , i32 noundef %v6 ) #0 !kcfi_type !5 {
155
+ entry:
156
+ %v1.addr = alloca i32 , align 4
157
+ %v2.addr = alloca i32 , align 4
158
+ %v3.addr = alloca i32 , align 4
159
+ %v4.addr = alloca i32 , align 4
160
+ %v5.addr = alloca i32 , align 4
161
+ %v6.addr = alloca i32 , align 4
162
+ store i32 %v1 , ptr %v1.addr , align 4
163
+ store i32 %v2 , ptr %v2.addr , align 4
164
+ store i32 %v3 , ptr %v3.addr , align 4
165
+ store i32 %v4 , ptr %v4.addr , align 4
166
+ store i32 %v5 , ptr %v5.addr , align 4
167
+ store i32 %v6 , ptr %v6.addr , align 4
168
+ ret void
169
+ }
170
+
171
+ ;; Ensure that functions with greater than 7 register arguments and no stack arguments are assigned arity=7
172
+ ; ASM-LABEL: __cfi_f11:
173
+ ; ASM: movl $1342488295, %edi # imm = 0x5004BEE7
174
+ define dso_local void @f11 (i32 noundef %v1 , i32 noundef %v2 , i32 noundef %v3 , i32 noundef %v4 , i32 noundef %v5 , i32 noundef %v6 , i32 noundef %v7 , i32 noundef %v8 ) #0 !kcfi_type !6 {
175
+ entry:
176
+ %v1.addr = alloca i32 , align 4
177
+ %v2.addr = alloca i32 , align 4
178
+ %v3.addr = alloca i32 , align 4
179
+ %v4.addr = alloca i32 , align 4
180
+ %v5.addr = alloca i32 , align 4
181
+ %v6.addr = alloca i32 , align 4
182
+ %v7.addr = alloca i32 , align 4
183
+ %v8.addr = alloca i32 , align 4
184
+ store i32 %v1 , ptr %v1.addr , align 4
185
+ store i32 %v2 , ptr %v2.addr , align 4
186
+ store i32 %v3 , ptr %v3.addr , align 4
187
+ store i32 %v4 , ptr %v4.addr , align 4
188
+ store i32 %v5 , ptr %v5.addr , align 4
189
+ store i32 %v6 , ptr %v6.addr , align 4
190
+ store i32 %v7 , ptr %v7.addr , align 4
191
+ store i32 %v8 , ptr %v8.addr , align 4
192
+ ret void
193
+ }
194
+
141
195
attributes #0 = { "target-features" ="+retpoline-indirect-branches,+retpoline-indirect-calls" }
142
196
143
197
!llvm.module.flags = !{!0 }
144
198
!0 = !{i32 4 , !"kcfi" , i32 1 }
145
199
!1 = !{i32 12345678 }
146
200
!2 = !{i32 4196274163 }
147
201
!3 = !{i32 98693133 }
202
+ !4 = !{i32 199571451 }
203
+ !5 = !{i32 1046421190 }
204
+ !6 = !{i32 1342488295 }
0 commit comments