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Fixing miscompilation due to undef picking the wrong branch
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2 files changed

+5
-9
lines changed

2 files changed

+5
-9
lines changed

llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1735,17 +1735,12 @@ Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V,
17351735
APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
17361736
if (auto *CV = dyn_cast<ConstantVector>(Sel->getCondition())) {
17371737
for (unsigned i = 0; i < VWidth; i++) {
1738-
// isNullValue() always returns false when called on a ConstantExpr.
1739-
// Skip constant expressions to avoid propagating incorrect information.
17401738
Constant *CElt = CV->getAggregateElement(i);
1741-
if (isa<ConstantExpr>(CElt))
1742-
continue;
1743-
// TODO: If a select condition element is undef, we can demand from
1744-
// either side. If one side is known undef, choosing that side would
1745-
// propagate undef.
1739+
1740+
// isNullValue() always returns false when called on a ConstantExpr.
17461741
if (CElt->isNullValue())
17471742
DemandedLHS.clearBit(i);
1748-
else
1743+
else if (CElt->isOneValue())
17491744
DemandedRHS.clearBit(i);
17501745
}
17511746
}

llvm/test/Transforms/InstCombine/pr98435.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,8 @@
44
define <2 x i1> @pr98435(<2 x i1> %val) {
55
; CHECK-LABEL: define <2 x i1> @pr98435(
66
; CHECK-SAME: <2 x i1> [[VAL:%.*]]) {
7-
; CHECK-NEXT: ret <2 x i1> <i1 poison, i1 true>
7+
; CHECK-NEXT: [[VAL1:%.*]] = select <2 x i1> <i1 undef, i1 true>, <2 x i1> <i1 true, i1 true>, <2 x i1> [[VAL]]
8+
; CHECK-NEXT: ret <2 x i1> [[VAL1]]
89
;
910
%val1 = select <2 x i1> <i1 undef, i1 true>, <2 x i1> <i1 true, i1 true>, <2 x i1> %val
1011
ret <2 x i1> %val1

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