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Revert "[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region boundaries" (#87699)
Reverts #79173 The testcase fails in non-asserts builds.
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llvm/lib/Target/ARM/Thumb2InstrInfo.cpp

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@@ -286,25 +286,6 @@ MachineInstr *Thumb2InstrInfo::commuteInstructionImpl(MachineInstr &MI,
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return ARMBaseInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
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}
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bool Thumb2InstrInfo::isSchedulingBoundary(const MachineInstr &MI,
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const MachineBasicBlock *MBB,
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const MachineFunction &MF) const {
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// BTI clearing instructions shall not take part in scheduling regions as
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// they must stay in their intended place. Although PAC isn't BTI clearing,
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// it can be transformed into PACBTI after the pre-RA Machine Scheduling
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// has taken place, so its movement must also be restricted.
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switch (MI.getOpcode()) {
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case ARM::t2BTI:
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case ARM::t2PAC:
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case ARM::t2PACBTI:
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case ARM::t2SG:
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return true;
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default:
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break;
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}
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return ARMBaseInstrInfo::isSchedulingBoundary(MI, MBB, MF);
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}
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void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI,
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const DebugLoc &dl, Register DestReg,

llvm/lib/Target/ARM/Thumb2InstrInfo.h

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@@ -68,10 +68,6 @@ class Thumb2InstrInfo : public ARMBaseInstrInfo {
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unsigned OpIdx1,
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unsigned OpIdx2) const override;
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bool isSchedulingBoundary(const MachineInstr &MI,
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const MachineBasicBlock *MBB,
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const MachineFunction &MF) const override;
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private:
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void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
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};

llvm/test/CodeGen/ARM/misched-branch-targets.mir

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