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[mlir][docs] Cleanup documentations [NFC] (#67945)
- Fix missing links - Fix missing link format - Move transform::ApplyFuncToLLVMConversionPatternOp into Transform dialect - Remove duplicated MemRef's TOC - Remove duplicated Memref's dma_start/dma_wait docs
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mlir/docs/Dialects/MemRef.md

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@@ -11,66 +11,3 @@ before adding or changing any operation in this dialect.**
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[include "Dialects/MemRefOps.md"]
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### 'dma_start' operation
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Syntax:
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```
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operation ::= `memref.dma_start` ssa-use`[`ssa-use-list`]` `,`
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ssa-use`[`ssa-use-list`]` `,` ssa-use `,`
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ssa-use`[`ssa-use-list`]` (`,` ssa-use `,` ssa-use)?
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`:` memref-type `,` memref-type `,` memref-type
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```
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Starts a non-blocking DMA operation that transfers data from a source memref to
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a destination memref. The operands include the source and destination memref's
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each followed by its indices, size of the data transfer in terms of the number
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of elements (of the elemental type of the memref), a tag memref with its
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indices, and optionally two additional arguments corresponding to the stride (in
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terms of number of elements) and the number of elements to transfer per stride.
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The tag location is used by a dma_wait operation to check for completion. The
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indices of the source memref, destination memref, and the tag memref have the
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same restrictions as any load/store operation in an affine context (whenever DMA
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operations appear in an affine context). See
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[restrictions on dimensions and symbols](Affine.md/#restrictions-on-dimensions-and-symbols)
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in affine contexts. This allows powerful static analysis and transformations in
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the presence of such DMAs including rescheduling, pipelining / overlap with
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computation, and checking for matching start/end operations. The source and
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destination memref need not be of the same dimensionality, but need to have the
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same elemental type.
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For example, a `memref.dma_start` operation that transfers 32 vector elements
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from a memref `%src` at location `[%i, %j]` to memref `%dst` at `[%k, %l]` would
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be specified as shown below.
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Example:
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```mlir
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%size = arith.constant 32 : index
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%tag = memref.alloc() : memref<1 x i32, affine_map<(d0) -> (d0)>, 4>
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%idx = arith.constant 0 : index
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memref.dma_start %src[%i, %j], %dst[%k, %l], %size, %tag[%idx] :
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memref<40 x 8 x vector<16xf32>, affine_map<(d0, d1) -> (d0, d1)>, 0>,
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memref<2 x 4 x vector<16xf32>, affine_map<(d0, d1) -> (d0, d1)>, 2>,
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memref<1 x i32>, affine_map<(d0) -> (d0)>, 4>
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```
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### 'dma_wait' operation
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Syntax:
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```
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operation ::= `memref.dma_wait` ssa-use`[`ssa-use-list`]` `,` ssa-use `:` memref-type
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```
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Blocks until the completion of a DMA operation associated with the tag element
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specified with a tag memref and its indices. The operands include the tag memref
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followed by its indices and the number of elements associated with the DMA being
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waited on. The indices of the tag memref have the same restrictions as
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load/store indices.
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Example:
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```mlir
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memref.dma_wait %tag[%idx], %size : memref<1 x i32, affine_map<(d0) -> (d0)>, 4>
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```

mlir/docs/Dialects/Transform.md

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@@ -423,6 +423,10 @@ ops rather than having the methods directly act on the payload IR.
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[include "Dialects/BufferizationTransformOps.md"]
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## Func Transform Operations
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[include "Dialects/FuncTransformOps.md"]
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## GPU Transform Operations
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[include "Dialects/GPUTransformOps.md"]

mlir/docs/PassManagement.md

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@@ -458,7 +458,7 @@ program has been run through the passes. This provides several benefits:
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In some situations it may be useful to run a pass pipeline within another pass,
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to allow configuring or filtering based on some invariants of the current
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operation being operated on. For example, the
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[Inliner Pass](Passes.md/#-inline-inline-function-calls) may want to run
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[Inliner Pass](Passes.md/#-inline) may want to run
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intraprocedural simplification passes while it is inlining to produce a better
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cost model, and provide more optimal inlining. To enable this, passes may run an
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arbitrary `OpPassManager` on the current operation being operated on or any

mlir/docs/Rationale/RationaleLinalgDialect.md

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@@ -384,7 +384,7 @@ Affine dialects in particular, Linalg takes the following decisions.
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multi-for loops with induction variables independent of each other (referred
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to as hyper-rectangular iteration domains in the literature) such as the
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proposed
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[affine.parallel]((https://llvm.discourse.group/t/rfc-add-affine-parallel/350)
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[affine.parallel](https://llvm.discourse.group/t/rfc-add-affine-parallel/350)
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are sufficient in the majority of cases.
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- **Declarative Tiling**: the *tiling* transformation is ubiquitous in HPC code
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generation. It can be seen as a decomposition of either the iteration space or

mlir/docs/Traits/_index.md

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@@ -40,7 +40,7 @@ Operation traits may also provide a `verifyTrait` or `verifyRegionTrait` hook
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that is called when verifying the concrete operation. The difference between
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these two is that whether the verifier needs to access the regions, if so, the
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operations in the regions will be verified before the verification of this
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trait. The [verification order](DefiningDialects/Operations.md/#verification-ordering)
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trait. The [verification order](../DefiningDialects/Operations.md/#verification-ordering)
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determines when a verifier will be invoked.
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```c++
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### Attaching Operation Traits in ODS
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To use an operation trait in the [ODS](DefiningDialects/Operations.md) framework, we need to
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To use an operation trait in the [ODS](../DefiningDialects/Operations.md) framework, we need to
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provide a definition of the trait class. This can be done using the
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`NativeOpTrait` and `ParamNativeOpTrait` classes. `ParamNativeOpTrait` provides
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a mechanism in which to specify arguments to a parametric trait class with an
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def OpWithInferTypeInterfaceOp : Op<...[MyTrait, MyParametricTrait<10>]> { ... }
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```
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See the documentation on [operation definitions](DefiningDialects/Operations.md) for more
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See the documentation on [operation definitions](../DefiningDialects/Operations.md) for more
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details.
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## Using a Trait
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information directly on the concrete object. `Traits` internally become `Base`
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classes of the concrete operation, so all of these are directly accessible. To
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expose this information opaquely to transformations and analyses,
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[`interfaces`](Interfaces.md) may be used.
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[`interfaces`](../Interfaces.md) may be used.
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To query if a specific object contains a specific trait, the `hasTrait<>` method
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may be used. This takes as a template parameter the trait class, which is the
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automatic allocation. Such allocations are automatically freed when control is
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transferred back from the regions of such operations. As an example, allocations
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performed by
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[`memref.alloca`](Dialects/MemRef.md/#memrefalloca-mlirmemrefallocaop) are
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[`memref.alloca`](../Dialects/MemRef.md/#memrefalloca-memrefallocaop) are
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automatically freed when control leaves the region of its closest surrounding op
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that has the trait AutomaticAllocationScope.
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This trait adds the property that the operation is known to have
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[broadcast-compatible](https://docs.scipy.org/doc/numpy/user/basics.broadcasting.html)
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operands and that its result type is compatible with the inferred broadcast shape. See [The `Broadcastable` Trait](Traits/Broadcastable.md) for details.
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operands and that its result type is compatible with the inferred broadcast shape.
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See [The `Broadcastable` Trait](Broadcastable.md) for details.
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### Commutative
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```
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This trait is an important structural property of the IR, and enables operations
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to have [passes](PassManagement.md) scheduled under them.
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to have [passes](../PassManagement) scheduled under them.
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### MemRefsNormalizable
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operations can be modified so that the `MemRef` has an identity layout
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specification. This can be implemented by associating the operation with its own
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index expression that can express the equivalent of the memory-layout
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specification of the MemRef type. See [the -normalize-memrefs pass].
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(https://mlir.llvm.org/docs/Passes/#-normalize-memrefs-normalize-memrefs)
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specification of the MemRef type. See [the -normalize-memrefs pass](../Passes.md/#-normalize-memrefs).
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### Single Block Region
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* `OpTrait::SymbolTable` -- `SymbolTable`
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This trait is used for operations that define a
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[`SymbolTable`](SymbolsAndSymbolTables.md#symbol-table).
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[`SymbolTable`](../SymbolsAndSymbolTables.md/#symbol-table).
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### Terminator
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* `OpTrait::IsTerminator` -- `Terminator`
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This trait provides verification and functionality for operations that are known
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to be [terminators](LangRef.md#terminator-operations).
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to be [terminators](../LangRef.md/#control-flow-and-ssacfg-regions).
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* `OpTrait::NoTerminator` -- `NoTerminator`
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This trait removes the requirement on regions held by an operation to have
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[terminator operations](LangRef.md#terminator-operations) at the end of a block.
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[terminator operations](../LangRef.md/#control-flow-and-ssacfg-regions) at the end of a block.
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This requires that these regions have a single block. An example of operation
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using this trait is the top-level `ModuleOp`.
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add_mlir_dialect(MemRefOps memref)
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add_mlir_doc(MemRefOps MemRefOps Dialects/ -gen-dialect-doc -dialect=memref)
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add_mlir_doc(MemRefOps MemRefOps Dialects/ -gen-op-doc)

mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td

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@@ -646,6 +646,15 @@ def MemRef_DimOp : MemRef_Op<"dim", [
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def MemRef_DmaStartOp : MemRef_Op<"dma_start"> {
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let summary = "non-blocking DMA operation that starts a transfer";
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let description = [{
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Syntax:
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```
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operation ::= `memref.dma_start` ssa-use`[`ssa-use-list`]` `,`
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ssa-use`[`ssa-use-list`]` `,` ssa-use `,`
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ssa-use`[`ssa-use-list`]` (`,` ssa-use `,` ssa-use)?
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`:` memref-type `,` memref-type `,` memref-type
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```
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DmaStartOp starts a non-blocking DMA operation that transfers data from a
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source memref to a destination memref. The source and destination memref
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need not be of the same dimensionality, but need to have the same elemental
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%num_elt_per_stride :
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```
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TODO: add additional operands to allow source and destination striding, and
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* TODO: add additional operands to allow source and destination striding, and
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multiple stride levels.
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TODO: Consider replacing src/dst memref indices with view memrefs.
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* TODO: Consider replacing src/dst memref indices with view memrefs.
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}];
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let arguments = (ins Variadic<AnyType>:$operands);
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Variadic<Index>:$tagIndices,
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Index:$numElements);
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let assemblyFormat = [{
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$tagMemRef `[` $tagIndices `]` `,` $numElements attr-dict `:`
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type($tagMemRef)
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$tagMemRef `[` $tagIndices `]` `,` $numElements attr-dict `:` type($tagMemRef)
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}];
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let extraClassDeclaration = [{
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/// Returns the rank (number of indices) of the tag memref.

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