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MC: Simplify code with isRelocation
1 parent 06de4d5 commit 7b0409a

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5 files changed

+8
-7
lines changed

5 files changed

+8
-7
lines changed

llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -421,6 +421,10 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
421421
MutableArrayRef<char> Data, uint64_t Value,
422422
bool IsResolved,
423423
const MCSubtargetInfo *STI) const {
424+
MCFixupKind Kind = Fixup.getKind();
425+
if (mc::isRelocation(Kind))
426+
return;
427+
424428
if (Fixup.getTargetKind() == FK_Data_8 && TheTriple.isOSBinFormatELF()) {
425429
auto RefKind = static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
426430
AArch64MCExpr::Specifier SymLoc = AArch64MCExpr::getSymbolLoc(RefKind);
@@ -441,9 +445,6 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
441445

442446
if (!Value)
443447
return; // Doesn't change encoding.
444-
unsigned Kind = Fixup.getKind();
445-
if (Kind >= FirstRelocationKind)
446-
return;
447448
unsigned NumBytes = getFixupKindNumBytes(Kind);
448449
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
449450
MCContext &Ctx = Asm.getContext();

llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -129,7 +129,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
129129

130130
// Extract the relocation type from the fixup kind, after applying STT_TLS as
131131
// needed.
132-
if (Kind >= FirstRelocationKind)
132+
if (mc::isRelocation(Fixup.getKind()))
133133
return Kind - FirstRelocationKind;
134134

135135
if (IsPCRel) {

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
7272
}
7373

7474
unsigned Kind = Fixup.getTargetKind();
75-
if (Kind >= FirstRelocationKind)
75+
if (mc::isRelocation(Fixup.getKind()))
7676
return Kind - FirstRelocationKind;
7777
switch (Kind) {
7878
default:

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -676,7 +676,7 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
676676
bool IsResolved,
677677
const MCSubtargetInfo *STI) const {
678678
MCFixupKind Kind = Fixup.getKind();
679-
if (Kind >= FirstRelocationKind)
679+
if (mc::isRelocation(Kind))
680680
return;
681681
MCContext &Ctx = Asm.getContext();
682682
MCFixupKindInfo Info = getFixupKindInfo(Kind);

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ const MCFixup *RISCVMCExpr::getPCRelHiFixup(const MCFragment **DFOut) const {
6868
if (F.getOffset() != Offset)
6969
continue;
7070
auto Kind = F.getTargetKind();
71-
if (Kind < FirstRelocationKind) {
71+
if (!mc::isRelocation(F.getKind())) {
7272
if (Kind == RISCV::fixup_riscv_pcrel_hi20) {
7373
*DFOut = DF;
7474
return &F;

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