@@ -217,7 +217,7 @@ class SIMemOpInfo final {
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class SIMemOpAccess final {
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private:
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- AMDGPUMachineModuleInfo *MMI = nullptr ;
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+ const AMDGPUMachineModuleInfo *MMI = nullptr ;
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// / Reports unsupported message \p Msg for \p MI to LLVM context.
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void reportUnsupported (const MachineBasicBlock::iterator &MI,
@@ -241,7 +241,7 @@ class SIMemOpAccess final {
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public:
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// / Construct class to support accessing the machine memory operands
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// / of instructions in the machine function \p MF.
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- SIMemOpAccess (MachineFunction &MF );
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+ SIMemOpAccess (const AMDGPUMachineModuleInfo &MMI );
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// / \returns Load info if \p MI is a load operation, "std::nullopt" otherwise.
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std::optional<SIMemOpInfo>
@@ -806,9 +806,8 @@ SIAtomicAddrSpace SIMemOpAccess::toSIAtomicAddrSpace(unsigned AS) const {
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return SIAtomicAddrSpace::OTHER;
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}
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- SIMemOpAccess::SIMemOpAccess (MachineFunction &MF) {
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- MMI = &MF.getMMI ().getObjFileInfo <AMDGPUMachineModuleInfo>();
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- }
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+ SIMemOpAccess::SIMemOpAccess (const AMDGPUMachineModuleInfo &MMI_)
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+ : MMI(&MMI_) {}
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std::optional<SIMemOpInfo> SIMemOpAccess::constructFromMIWithMMO (
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const MachineBasicBlock::iterator &MI) const {
@@ -2802,7 +2801,10 @@ bool SIMemoryLegalizer::expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
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bool SIMemoryLegalizer::runOnMachineFunction (MachineFunction &MF) {
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bool Changed = false ;
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- SIMemOpAccess MOA (MF);
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+ const MachineModuleInfo &MMI =
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+ getAnalysis<MachineModuleInfoWrapperPass>().getMMI ();
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+
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+ SIMemOpAccess MOA (MMI.getObjFileInfo <AMDGPUMachineModuleInfo>());
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CC = SICacheControl::create (MF.getSubtarget <GCNSubtarget>());
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for (auto &MBB : MF) {
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