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[InstCombine] Fold dependent IVs (#81151)
Fold `iv = phi(start, iv.next = iv2.next + start)` where `iv2 = phi(iv2.start, iv2.next = iv2 + iv2.step)` to `iv = iv2 + start` removing one induction variable from the loop. Proof: https://alive2.llvm.org/ce/z/hfmwgf Fixes #77108.
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2 files changed

+87
-48
lines changed

2 files changed

+87
-48
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1378,6 +1378,58 @@ static Value *simplifyUsingControlFlow(InstCombiner &Self, PHINode &PN,
13781378
return nullptr;
13791379
}
13801380

1381+
// Fold iv = phi(start, iv.next = iv2.next op start)
1382+
// where iv2 = phi(iv2.start, iv2.next = iv2 + iv2.step)
1383+
// and iv2.start op start = start
1384+
// to iv = iv2 op start
1385+
static Value *foldDependentIVs(PHINode &PN, IRBuilderBase &Builder) {
1386+
BasicBlock *BB = PN.getParent();
1387+
if (PN.getNumIncomingValues() != 2)
1388+
return nullptr;
1389+
1390+
Value *Start;
1391+
Instruction *IvNext;
1392+
BinaryOperator *Iv2Next;
1393+
auto MatchOuterIV = [&](Value *V1, Value *V2) {
1394+
if (match(V2, m_c_BinOp(m_Specific(V1), m_BinOp(Iv2Next))) ||
1395+
match(V2, m_GEP(m_Specific(V1), m_BinOp(Iv2Next)))) {
1396+
Start = V1;
1397+
IvNext = cast<Instruction>(V2);
1398+
return true;
1399+
}
1400+
return false;
1401+
};
1402+
1403+
if (!MatchOuterIV(PN.getIncomingValue(0), PN.getIncomingValue(1)) &&
1404+
!MatchOuterIV(PN.getIncomingValue(1), PN.getIncomingValue(0)))
1405+
return nullptr;
1406+
1407+
PHINode *Iv2;
1408+
Value *Iv2Start, *Iv2Step;
1409+
if (!matchSimpleRecurrence(Iv2Next, Iv2, Iv2Start, Iv2Step) ||
1410+
Iv2->getParent() != BB)
1411+
return nullptr;
1412+
1413+
auto *BO = dyn_cast<BinaryOperator>(IvNext);
1414+
Constant *Identity =
1415+
BO ? ConstantExpr::getBinOpIdentity(BO->getOpcode(), Iv2Start->getType())
1416+
: Constant::getNullValue(Iv2Start->getType());
1417+
if (Iv2Start != Identity)
1418+
return nullptr;
1419+
1420+
Builder.SetInsertPoint(&*BB, BB->getFirstInsertionPt());
1421+
if (!BO) {
1422+
auto *GEP = cast<GEPOperator>(IvNext);
1423+
return Builder.CreateGEP(GEP->getSourceElementType(), Start, Iv2, "",
1424+
cast<GEPOperator>(IvNext)->isInBounds());
1425+
}
1426+
1427+
assert(BO->isCommutative() && "Must be commutative");
1428+
Value *Res = Builder.CreateBinOp(BO->getOpcode(), Iv2, Start);
1429+
cast<Instruction>(Res)->copyIRFlags(BO);
1430+
return Res;
1431+
}
1432+
13811433
// PHINode simplification
13821434
//
13831435
Instruction *InstCombinerImpl::visitPHINode(PHINode &PN) {
@@ -1595,5 +1647,8 @@ Instruction *InstCombinerImpl::visitPHINode(PHINode &PN) {
15951647
if (auto *V = simplifyUsingControlFlow(*this, PN, DT))
15961648
return replaceInstUsesWith(PN, V);
15971649

1650+
if (Value *Res = foldDependentIVs(PN, Builder))
1651+
return replaceInstUsesWith(PN, Res);
1652+
15981653
return nullptr;
15991654
}

‎llvm/test/Transforms/InstCombine/dependent-ivs.ll

Lines changed: 32 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -7,11 +7,10 @@ define void @int_iv_nuw(i64 %base, i64 %end) {
77
; CHECK-NEXT: entry:
88
; CHECK-NEXT: br label [[LOOP:%.*]]
99
; CHECK: loop:
10-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
11-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
10+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
11+
; CHECK-NEXT: [[IV2:%.*]] = add nuw i64 [[IV]], [[BASE]]
1212
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
1313
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
14-
; CHECK-NEXT: [[IV2_NEXT]] = add nuw i64 [[IV_NEXT]], [[BASE]]
1514
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
1615
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
1716
; CHECK: exit:
@@ -39,11 +38,10 @@ define void @int_iv_nsw(i64 %base, i64 %end) {
3938
; CHECK-NEXT: entry:
4039
; CHECK-NEXT: br label [[LOOP:%.*]]
4140
; CHECK: loop:
42-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
43-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
41+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
42+
; CHECK-NEXT: [[IV2:%.*]] = add nsw i64 [[IV]], [[BASE]]
4443
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
4544
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
46-
; CHECK-NEXT: [[IV2_NEXT]] = add nsw i64 [[IV_NEXT]], [[BASE]]
4745
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
4846
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
4947
; CHECK: exit:
@@ -72,11 +70,10 @@ define void @int_iv_commuted_add(i64 %base, i64 %end) {
7270
; CHECK-NEXT: [[BASE2:%.*]] = mul i64 [[BASE]], 42
7371
; CHECK-NEXT: br label [[LOOP:%.*]]
7472
; CHECK: loop:
75-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE2]], [[ENTRY:%.*]] ]
76-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
73+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
74+
; CHECK-NEXT: [[IV2:%.*]] = add i64 [[IV]], [[BASE2]]
7775
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
7876
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
79-
; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[BASE2]], [[IV_NEXT]]
8077
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
8178
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
8279
; CHECK: exit:
@@ -105,11 +102,10 @@ define void @int_iv_commuted_phi1(i64 %base, i64 %end) {
105102
; CHECK-NEXT: entry:
106103
; CHECK-NEXT: br label [[LOOP:%.*]]
107104
; CHECK: loop:
108-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[BASE]], [[ENTRY:%.*]] ], [ [[IV2_NEXT:%.*]], [[LOOP]] ]
109-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
105+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
106+
; CHECK-NEXT: [[IV2:%.*]] = add i64 [[IV]], [[BASE]]
110107
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
111108
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
112-
; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]]
113109
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
114110
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
115111
; CHECK: exit:
@@ -137,11 +133,10 @@ define void @int_iv_commuted_phi2(i64 %base, i64 %end) {
137133
; CHECK-NEXT: entry:
138134
; CHECK-NEXT: br label [[LOOP:%.*]]
139135
; CHECK: loop:
140-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
141-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
136+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
137+
; CHECK-NEXT: [[IV2:%.*]] = add i64 [[IV]], [[BASE]]
142138
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
143139
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
144-
; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]]
145140
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
146141
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
147142
; CHECK: exit:
@@ -169,11 +164,10 @@ define void @int_iv_vector(<2 x i64> %base) {
169164
; CHECK-NEXT: entry:
170165
; CHECK-NEXT: br label [[LOOP:%.*]]
171166
; CHECK: loop:
172-
; CHECK-NEXT: [[IV2:%.*]] = phi <2 x i64> [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
173-
; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ zeroinitializer, [[ENTRY]] ]
167+
; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ zeroinitializer, [[ENTRY:%.*]] ]
168+
; CHECK-NEXT: [[IV2:%.*]] = add <2 x i64> [[IV]], [[BASE]]
174169
; CHECK-NEXT: call void @use.v2i64(<2 x i64> [[IV2]])
175170
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw <2 x i64> [[IV]], <i64 4, i64 4>
176-
; CHECK-NEXT: [[IV2_NEXT]] = add <2 x i64> [[IV_NEXT]], [[BASE]]
177171
; CHECK-NEXT: [[CMP:%.*]] = call i1 @get.i1()
178172
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
179173
; CHECK: exit:
@@ -233,12 +227,11 @@ define void @int_iv_loop_variant_step(i64 %base, i64 %end) {
233227
; CHECK-NEXT: entry:
234228
; CHECK-NEXT: br label [[LOOP:%.*]]
235229
; CHECK: loop:
236-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
237-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
230+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
231+
; CHECK-NEXT: [[IV2:%.*]] = add nuw i64 [[IV]], [[BASE]]
238232
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
239233
; CHECK-NEXT: [[STEP:%.*]] = call i64 @get.i64()
240234
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], [[STEP]]
241-
; CHECK-NEXT: [[IV2_NEXT]] = add nuw i64 [[IV_NEXT]], [[BASE]]
242235
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
243236
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
244237
; CHECK: exit:
@@ -267,11 +260,10 @@ define void @int_iv_xor(i64 %base, i64 %end) {
267260
; CHECK-NEXT: entry:
268261
; CHECK-NEXT: br label [[LOOP:%.*]]
269262
; CHECK: loop:
270-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
271-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
263+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
264+
; CHECK-NEXT: [[IV2:%.*]] = xor i64 [[IV]], [[BASE]]
272265
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
273266
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
274-
; CHECK-NEXT: [[IV2_NEXT]] = xor i64 [[IV_NEXT]], [[BASE]]
275267
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
276268
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
277269
; CHECK: exit:
@@ -299,11 +291,10 @@ define void @int_iv_or(i64 %base, i64 %end) {
299291
; CHECK-NEXT: entry:
300292
; CHECK-NEXT: br label [[LOOP:%.*]]
301293
; CHECK: loop:
302-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
303-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
294+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
295+
; CHECK-NEXT: [[IV2:%.*]] = or i64 [[IV]], [[BASE]]
304296
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
305297
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
306-
; CHECK-NEXT: [[IV2_NEXT]] = or i64 [[IV_NEXT]], [[BASE]]
307298
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
308299
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
309300
; CHECK: exit:
@@ -331,11 +322,10 @@ define void @int_iv_or_disjoint(i64 %base, i64 %end) {
331322
; CHECK-NEXT: entry:
332323
; CHECK-NEXT: br label [[LOOP:%.*]]
333324
; CHECK: loop:
334-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
335-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
325+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
326+
; CHECK-NEXT: [[IV2:%.*]] = or disjoint i64 [[IV]], [[BASE]]
336327
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
337328
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
338-
; CHECK-NEXT: [[IV2_NEXT]] = or disjoint i64 [[IV_NEXT]], [[BASE]]
339329
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
340330
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
341331
; CHECK: exit:
@@ -363,11 +353,10 @@ define void @int_iv_and(i64 %base, i64 %end) {
363353
; CHECK-NEXT: entry:
364354
; CHECK-NEXT: br label [[LOOP:%.*]]
365355
; CHECK: loop:
366-
; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
367-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ -1, [[ENTRY]] ]
356+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ -1, [[ENTRY:%.*]] ]
357+
; CHECK-NEXT: [[IV2:%.*]] = and i64 [[IV]], [[BASE]]
368358
; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
369359
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
370-
; CHECK-NEXT: [[IV2_NEXT]] = and i64 [[IV_NEXT]], [[BASE]]
371360
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
372361
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
373362
; CHECK: exit:
@@ -523,11 +512,10 @@ define void @ptr_iv_inbounds(ptr %base, i64 %end) {
523512
; CHECK-NEXT: entry:
524513
; CHECK-NEXT: br label [[LOOP:%.*]]
525514
; CHECK: loop:
526-
; CHECK-NEXT: [[IV_PTR:%.*]] = phi ptr [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
527-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
515+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
516+
; CHECK-NEXT: [[IV_PTR:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[IV]]
528517
; CHECK-NEXT: call void @use.p0(ptr [[IV_PTR]])
529518
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
530-
; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[IV_NEXT]]
531519
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
532520
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
533521
; CHECK: exit:
@@ -555,11 +543,10 @@ define void @ptr_iv_no_inbounds(ptr %base, i64 %end) {
555543
; CHECK-NEXT: entry:
556544
; CHECK-NEXT: br label [[LOOP:%.*]]
557545
; CHECK: loop:
558-
; CHECK-NEXT: [[IV_PTR:%.*]] = phi ptr [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
559-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
546+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
547+
; CHECK-NEXT: [[IV_PTR:%.*]] = getelementptr i8, ptr [[BASE]], i64 [[IV]]
560548
; CHECK-NEXT: call void @use.p0(ptr [[IV_PTR]])
561549
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
562-
; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr i8, ptr [[BASE]], i64 [[IV_NEXT]]
563550
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
564551
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
565552
; CHECK: exit:
@@ -587,11 +574,10 @@ define void @ptr_iv_non_i8_type(ptr %base, i64 %end) {
587574
; CHECK-NEXT: entry:
588575
; CHECK-NEXT: br label [[LOOP:%.*]]
589576
; CHECK: loop:
590-
; CHECK-NEXT: [[IV_PTR:%.*]] = phi ptr [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
591-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
577+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
578+
; CHECK-NEXT: [[IV_PTR:%.*]] = getelementptr i32, ptr [[BASE]], i64 [[IV]]
592579
; CHECK-NEXT: call void @use.p0(ptr [[IV_PTR]])
593580
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
594-
; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr i32, ptr [[BASE]], i64 [[IV_NEXT]]
595581
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
596582
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
597583
; CHECK: exit:
@@ -619,11 +605,10 @@ define void @ptr_iv_vector(<2 x ptr> %base, i64 %end) {
619605
; CHECK-NEXT: entry:
620606
; CHECK-NEXT: br label [[LOOP:%.*]]
621607
; CHECK: loop:
622-
; CHECK-NEXT: [[IV_PTR:%.*]] = phi <2 x ptr> [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
623-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
608+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
609+
; CHECK-NEXT: [[IV_PTR:%.*]] = getelementptr inbounds i8, <2 x ptr> [[BASE]], i64 [[IV]]
624610
; CHECK-NEXT: call void @use.v2p0(<2 x ptr> [[IV_PTR]])
625611
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
626-
; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr inbounds i8, <2 x ptr> [[BASE]], i64 [[IV_NEXT]]
627612
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
628613
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
629614
; CHECK: exit:
@@ -651,11 +636,10 @@ define void @ptr_iv_vector2(<2 x ptr> %base) {
651636
; CHECK-NEXT: entry:
652637
; CHECK-NEXT: br label [[LOOP:%.*]]
653638
; CHECK: loop:
654-
; CHECK-NEXT: [[IV_PTR:%.*]] = phi <2 x ptr> [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
655-
; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ zeroinitializer, [[ENTRY]] ]
639+
; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ zeroinitializer, [[ENTRY:%.*]] ]
640+
; CHECK-NEXT: [[IV_PTR:%.*]] = getelementptr i8, <2 x ptr> [[BASE]], <2 x i64> [[IV]]
656641
; CHECK-NEXT: call void @use.v2p0(<2 x ptr> [[IV_PTR]])
657642
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw <2 x i64> [[IV]], <i64 4, i64 4>
658-
; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr i8, <2 x ptr> [[BASE]], <2 x i64> [[IV_NEXT]]
659643
; CHECK-NEXT: [[CMP:%.*]] = call i1 @get.i1()
660644
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
661645
; CHECK: exit:

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