Skip to content

Commit 7dbd6cd

Browse files
shiltianshiltian
authored
[AMDGPU][Attributor] Make AAAMDFlatWorkGroupSize honor existing attribute (#114357)
If a function has `amdgpu-flat-work-group-size`, honor it in `initialize` by taking its value directly; otherwise, it uses the default range as a starting point. We will no longer manipulate the known range, which can cause issues because the known range is a "throttle" to the assumed range such that the assumed range can't get widened properly in `updateImpl` if the known range is not set properly for whatever reasons. Another benefit of not touching the known range is, if we indicate pessimistic state, it also invalidates the AA such that `manifest` will not be called. Since we honor the attribute, we don't want and will not add any half-baked attribute added to a function.
1 parent d5b7b97 commit 7dbd6cd

30 files changed

+430
-361
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

Lines changed: 68 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -168,9 +168,18 @@ class AMDGPUInformationCache : public InformationCache {
168168
return ST.supportsGetDoorbellID();
169169
}
170170

171-
std::pair<unsigned, unsigned> getFlatWorkGroupSizes(const Function &F) {
171+
std::optional<std::pair<unsigned, unsigned>>
172+
getFlatWorkGroupSizeAttr(const Function &F) const {
173+
auto R = AMDGPU::getIntegerPairAttribute(F, "amdgpu-flat-work-group-size");
174+
if (!R)
175+
return std::nullopt;
176+
return std::make_pair(R->first, *(R->second));
177+
}
178+
179+
std::pair<unsigned, unsigned>
180+
getDefaultFlatWorkGroupSize(const Function &F) const {
172181
const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F);
173-
return ST.getFlatWorkGroupSizes(F);
182+
return ST.getDefaultFlatWorkGroupSize(F.getCallingConv());
174183
}
175184

176185
std::pair<unsigned, unsigned>
@@ -812,6 +821,35 @@ struct AAAMDSizeRangeAttribute
812821
return Change;
813822
}
814823

824+
/// Clamp the assumed range to the default value ([Min, Max]) and emit the
825+
/// attribute if it is not same as default.
826+
ChangeStatus
827+
emitAttributeIfNotDefaultAfterClamp(Attributor &A,
828+
std::pair<unsigned, unsigned> Default) {
829+
auto [Min, Max] = Default;
830+
unsigned Lower = getAssumed().getLower().getZExtValue();
831+
unsigned Upper = getAssumed().getUpper().getZExtValue();
832+
833+
// Clamp the range to the default value.
834+
if (Lower < Min)
835+
Lower = Min;
836+
if (Upper > Max + 1)
837+
Upper = Max + 1;
838+
839+
// No manifest if the value is invalid or same as default after clamp.
840+
if ((Lower == Min && Upper == Max + 1) || (Upper < Lower))
841+
return ChangeStatus::UNCHANGED;
842+
843+
Function *F = getAssociatedFunction();
844+
LLVMContext &Ctx = F->getContext();
845+
SmallString<10> Buffer;
846+
raw_svector_ostream OS(Buffer);
847+
OS << Lower << ',' << Upper - 1;
848+
return A.manifestAttrs(getIRPosition(),
849+
{Attribute::get(Ctx, AttrName, OS.str())},
850+
/*ForceReplace=*/true);
851+
}
852+
815853
ChangeStatus emitAttributeIfNotDefault(Attributor &A, unsigned Min,
816854
unsigned Max) {
817855
// Don't add the attribute if it's the implied default.
@@ -846,13 +884,33 @@ struct AAAMDFlatWorkGroupSize : public AAAMDSizeRangeAttribute {
846884
void initialize(Attributor &A) override {
847885
Function *F = getAssociatedFunction();
848886
auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
849-
unsigned MinGroupSize, MaxGroupSize;
850-
std::tie(MinGroupSize, MaxGroupSize) = InfoCache.getFlatWorkGroupSizes(*F);
851-
intersectKnown(
852-
ConstantRange(APInt(32, MinGroupSize), APInt(32, MaxGroupSize + 1)));
853887

854-
if (AMDGPU::isEntryFunctionCC(F->getCallingConv()))
855-
indicatePessimisticFixpoint();
888+
bool HasAttr = false;
889+
auto Range = InfoCache.getDefaultFlatWorkGroupSize(*F);
890+
auto MaxRange = InfoCache.getMaximumFlatWorkGroupRange(*F);
891+
892+
if (auto Attr = InfoCache.getFlatWorkGroupSizeAttr(*F)) {
893+
// We only consider an attribute that is not max range because the front
894+
// end always emits the attribute, unfortunately, and sometimes it emits
895+
// the max range.
896+
if (*Attr != MaxRange) {
897+
Range = *Attr;
898+
HasAttr = true;
899+
}
900+
}
901+
902+
// We don't want to directly clamp the state if it's the max range because
903+
// that is basically the worst state.
904+
if (Range == MaxRange)
905+
return;
906+
907+
auto [Min, Max] = Range;
908+
ConstantRange CR(APInt(32, Min), APInt(32, Max + 1));
909+
IntegerRangeState IRS(CR);
910+
clampStateAndIndicateChange(this->getState(), IRS);
911+
912+
if (HasAttr || AMDGPU::isEntryFunctionCC(F->getCallingConv()))
913+
indicateOptimisticFixpoint();
856914
}
857915

858916
ChangeStatus updateImpl(Attributor &A) override {
@@ -866,9 +924,8 @@ struct AAAMDFlatWorkGroupSize : public AAAMDSizeRangeAttribute {
866924
ChangeStatus manifest(Attributor &A) override {
867925
Function *F = getAssociatedFunction();
868926
auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
869-
unsigned Min, Max;
870-
std::tie(Min, Max) = InfoCache.getMaximumFlatWorkGroupRange(*F);
871-
return emitAttributeIfNotDefault(A, Min, Max);
927+
return emitAttributeIfNotDefaultAfterClamp(
928+
A, InfoCache.getMaximumFlatWorkGroupRange(*F));
872929
}
873930

874931
/// See AbstractAttribute::getName()

‎llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Lines changed: 16 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1332,22 +1332,33 @@ std::pair<unsigned, unsigned>
13321332
getIntegerPairAttribute(const Function &F, StringRef Name,
13331333
std::pair<unsigned, unsigned> Default,
13341334
bool OnlyFirstRequired) {
1335+
if (auto Attr = getIntegerPairAttribute(F, Name, OnlyFirstRequired))
1336+
return {Attr->first, Attr->second ? *(Attr->second) : Default.second};
1337+
return Default;
1338+
}
1339+
1340+
std::optional<std::pair<unsigned, std::optional<unsigned>>>
1341+
getIntegerPairAttribute(const Function &F, StringRef Name,
1342+
bool OnlyFirstRequired) {
13351343
Attribute A = F.getFnAttribute(Name);
13361344
if (!A.isStringAttribute())
1337-
return Default;
1345+
return std::nullopt;
13381346

13391347
LLVMContext &Ctx = F.getContext();
1340-
std::pair<unsigned, unsigned> Ints = Default;
1348+
std::pair<unsigned, std::optional<unsigned>> Ints;
13411349
std::pair<StringRef, StringRef> Strs = A.getValueAsString().split(',');
13421350
if (Strs.first.trim().getAsInteger(0, Ints.first)) {
13431351
Ctx.emitError("can't parse first integer attribute " + Name);
1344-
return Default;
1352+
return std::nullopt;
13451353
}
1346-
if (Strs.second.trim().getAsInteger(0, Ints.second)) {
1354+
unsigned Second = 0;
1355+
if (Strs.second.trim().getAsInteger(0, Second)) {
13471356
if (!OnlyFirstRequired || !Strs.second.trim().empty()) {
13481357
Ctx.emitError("can't parse second integer attribute " + Name);
1349-
return Default;
1358+
return std::nullopt;
13501359
}
1360+
} else {
1361+
Ints.second = Second;
13511362
}
13521363

13531364
return Ints;

‎llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -936,6 +936,19 @@ getIntegerPairAttribute(const Function &F, StringRef Name,
936936
std::pair<unsigned, unsigned> Default,
937937
bool OnlyFirstRequired = false);
938938

939+
/// \returns A pair of integer values requested using \p F's \p Name attribute
940+
/// in "first[,second]" format ("second" is optional unless \p OnlyFirstRequired
941+
/// is false).
942+
///
943+
/// \returns \p std::nullopt if attribute is not present.
944+
///
945+
/// \returns \p std::nullopt and emits error if one of the requested values
946+
/// cannot be converted to integer, or \p OnlyFirstRequired is false and
947+
/// "second" value is not present.
948+
std::optional<std::pair<unsigned, std::optional<unsigned>>>
949+
getIntegerPairAttribute(const Function &F, StringRef Name,
950+
bool OnlyFirstRequired = false);
951+
939952
/// \returns Generate a vector of integer values requested using \p F's \p Name
940953
/// attribute.
941954
///

‎llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -217,7 +217,7 @@ define ptr addrspace(3) @ret_constant_cast_group_gv_gep_to_flat_to_group() #1 {
217217
; AKF_HSA-NEXT: ret ptr addrspace(3) addrspacecast (ptr addrspace(4) getelementptr ([256 x i32], ptr addrspace(4) addrspacecast (ptr addrspace(3) @lds.arr to ptr addrspace(4)), i64 0, i64 8) to ptr addrspace(3))
218218
;
219219
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@ret_constant_cast_group_gv_gep_to_flat_to_group
220-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR3:[0-9]+]] {
220+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR2]] {
221221
; ATTRIBUTOR_HSA-NEXT: ret ptr addrspace(3) addrspacecast (ptr addrspace(4) getelementptr ([256 x i32], ptr addrspace(4) addrspacecast (ptr addrspace(3) @lds.arr to ptr addrspace(4)), i64 0, i64 8) to ptr addrspace(3))
222222
;
223223
ret ptr addrspace(3) addrspacecast (ptr addrspace(4) getelementptr ([256 x i32], ptr addrspace(4) addrspacecast (ptr addrspace(3) @lds.arr to ptr addrspace(4)), i64 0, i64 8) to ptr addrspace(3))
@@ -235,7 +235,6 @@ attributes #1 = { nounwind }
235235
; ATTRIBUTOR_HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
236236
; ATTRIBUTOR_HSA: attributes #[[ATTR1]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
237237
; ATTRIBUTOR_HSA: attributes #[[ATTR2]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
238-
; ATTRIBUTOR_HSA: attributes #[[ATTR3]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
239238
;.
240239
; AKF_HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
241240
;.

‎llvm/test/CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll

Lines changed: 16 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ define amdgpu_kernel void @kernel_uses_asm_physreg_tuple() {
7373

7474
define void @func_uses_asm_virtreg_agpr() {
7575
; CHECK-LABEL: define void @func_uses_asm_virtreg_agpr(
76-
; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {
76+
; CHECK-SAME: ) #[[ATTR0]] {
7777
; CHECK-NEXT: call void asm sideeffect "
7878
; CHECK-NEXT: ret void
7979
;
@@ -83,7 +83,7 @@ define void @func_uses_asm_virtreg_agpr() {
8383

8484
define void @func_uses_asm_physreg_agpr() {
8585
; CHECK-LABEL: define void @func_uses_asm_physreg_agpr(
86-
; CHECK-SAME: ) #[[ATTR2]] {
86+
; CHECK-SAME: ) #[[ATTR0]] {
8787
; CHECK-NEXT: call void asm sideeffect "
8888
; CHECK-NEXT: ret void
8989
;
@@ -93,7 +93,7 @@ define void @func_uses_asm_physreg_agpr() {
9393

9494
define void @func_uses_asm_physreg_agpr_tuple() {
9595
; CHECK-LABEL: define void @func_uses_asm_physreg_agpr_tuple(
96-
; CHECK-SAME: ) #[[ATTR2]] {
96+
; CHECK-SAME: ) #[[ATTR0]] {
9797
; CHECK-NEXT: call void asm sideeffect "
9898
; CHECK-NEXT: ret void
9999
;
@@ -105,7 +105,7 @@ declare void @unknown()
105105

106106
define amdgpu_kernel void @kernel_calls_extern() {
107107
; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_extern(
108-
; CHECK-SAME: ) #[[ATTR4:[0-9]+]] {
108+
; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {
109109
; CHECK-NEXT: call void @unknown()
110110
; CHECK-NEXT: ret void
111111
;
@@ -115,8 +115,8 @@ define amdgpu_kernel void @kernel_calls_extern() {
115115

116116
define amdgpu_kernel void @kernel_calls_extern_marked_callsite() {
117117
; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_extern_marked_callsite(
118-
; CHECK-SAME: ) #[[ATTR4]] {
119-
; CHECK-NEXT: call void @unknown() #[[ATTR10:[0-9]+]]
118+
; CHECK-SAME: ) #[[ATTR2]] {
119+
; CHECK-NEXT: call void @unknown() #[[ATTR6:[0-9]+]]
120120
; CHECK-NEXT: ret void
121121
;
122122
call void @unknown() #0
@@ -125,7 +125,7 @@ define amdgpu_kernel void @kernel_calls_extern_marked_callsite() {
125125

126126
define amdgpu_kernel void @kernel_calls_indirect(ptr %indirect) {
127127
; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_indirect(
128-
; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR4]] {
128+
; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR2]] {
129129
; CHECK-NEXT: call void [[INDIRECT]]()
130130
; CHECK-NEXT: ret void
131131
;
@@ -135,8 +135,8 @@ define amdgpu_kernel void @kernel_calls_indirect(ptr %indirect) {
135135

136136
define amdgpu_kernel void @kernel_calls_indirect_marked_callsite(ptr %indirect) {
137137
; CHECK-LABEL: define amdgpu_kernel void @kernel_calls_indirect_marked_callsite(
138-
; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR4]] {
139-
; CHECK-NEXT: call void [[INDIRECT]]() #[[ATTR10]]
138+
; CHECK-SAME: ptr [[INDIRECT:%.*]]) #[[ATTR2]] {
139+
; CHECK-NEXT: call void [[INDIRECT]]() #[[ATTR6]]
140140
; CHECK-NEXT: ret void
141141
;
142142
call void %indirect() #0
@@ -155,15 +155,15 @@ define amdgpu_kernel void @kernel_transitively_uses_agpr_asm() {
155155

156156
define void @empty() {
157157
; CHECK-LABEL: define void @empty(
158-
; CHECK-SAME: ) #[[ATTR5:[0-9]+]] {
158+
; CHECK-SAME: ) #[[ATTR1]] {
159159
; CHECK-NEXT: ret void
160160
;
161161
ret void
162162
}
163163

164164
define void @also_empty() {
165165
; CHECK-LABEL: define void @also_empty(
166-
; CHECK-SAME: ) #[[ATTR5]] {
166+
; CHECK-SAME: ) #[[ATTR1]] {
167167
; CHECK-NEXT: ret void
168168
;
169169
ret void
@@ -256,12 +256,9 @@ attributes #0 = { "amdgpu-no-agpr" }
256256
;.
257257
; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
258258
; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
259-
; CHECK: attributes #[[ATTR2]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
260-
; CHECK: attributes #[[ATTR3:[0-9]+]] = { "amdgpu-waves-per-eu"="4,8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
261-
; CHECK: attributes #[[ATTR4]] = { "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
262-
; CHECK: attributes #[[ATTR5]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,8" "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
263-
; CHECK: attributes #[[ATTR6:[0-9]+]] = { convergent nocallback nofree nosync nounwind willreturn memory(none) "target-cpu"="gfx90a" }
264-
; CHECK: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-cpu"="gfx90a" }
265-
; CHECK: attributes #[[ATTR9:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) "target-cpu"="gfx90a" }
266-
; CHECK: attributes #[[ATTR10]] = { "amdgpu-no-agpr" }
259+
; CHECK: attributes #[[ATTR2]] = { "target-cpu"="gfx90a" "uniform-work-group-size"="false" }
260+
; CHECK: attributes #[[ATTR3:[0-9]+]] = { convergent nocallback nofree nosync nounwind willreturn memory(none) "target-cpu"="gfx90a" }
261+
; CHECK: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-cpu"="gfx90a" }
262+
; CHECK: attributes #[[ATTR5:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) "target-cpu"="gfx90a" }
263+
; CHECK: attributes #[[ATTR6]] = { "amdgpu-no-agpr" }
267264
;.

‎llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -117,14 +117,14 @@ define void @call_no_dispatch_id() {
117117
ret void
118118
}
119119
;.
120-
; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-workitem-id-x" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
121-
; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-workitem-id-y" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
122-
; CHECK: attributes #[[ATTR2]] = { "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
123-
; CHECK: attributes #[[ATTR3]] = { "amdgpu-no-workgroup-id-x" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
124-
; CHECK: attributes #[[ATTR4]] = { "amdgpu-no-workgroup-id-y" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
125-
; CHECK: attributes #[[ATTR5]] = { "amdgpu-no-workgroup-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
126-
; CHECK: attributes #[[ATTR6]] = { "amdgpu-no-dispatch-ptr" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
127-
; CHECK: attributes #[[ATTR7]] = { "amdgpu-no-queue-ptr" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
128-
; CHECK: attributes #[[ATTR8]] = { "amdgpu-no-implicitarg-ptr" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
129-
; CHECK: attributes #[[ATTR9]] = { "amdgpu-no-dispatch-id" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
120+
; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-workitem-id-x" "uniform-work-group-size"="false" }
121+
; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-workitem-id-y" "uniform-work-group-size"="false" }
122+
; CHECK: attributes #[[ATTR2]] = { "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
123+
; CHECK: attributes #[[ATTR3]] = { "amdgpu-no-workgroup-id-x" "uniform-work-group-size"="false" }
124+
; CHECK: attributes #[[ATTR4]] = { "amdgpu-no-workgroup-id-y" "uniform-work-group-size"="false" }
125+
; CHECK: attributes #[[ATTR5]] = { "amdgpu-no-workgroup-id-z" "uniform-work-group-size"="false" }
126+
; CHECK: attributes #[[ATTR6]] = { "amdgpu-no-dispatch-ptr" "uniform-work-group-size"="false" }
127+
; CHECK: attributes #[[ATTR7]] = { "amdgpu-no-queue-ptr" "uniform-work-group-size"="false" }
128+
; CHECK: attributes #[[ATTR8]] = { "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
129+
; CHECK: attributes #[[ATTR9]] = { "amdgpu-no-dispatch-id" "uniform-work-group-size"="false" }
130130
;.

0 commit comments

Comments
 (0)