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[CSKY] Optimize IR pattern icmp-select with INCT32/INCF32
Reviewed By: zixuan-wu Differential Revision: https://reviews.llvm.org/D153436
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-45
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2 files changed

+72
-45
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‎llvm/lib/Target/CSKY/CSKYInstrInfo.td

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1253,6 +1253,34 @@ let Predicates = [iHasE2] in {
12531253
// Select Patterns.
12541254
let Predicates = [iHasE2] in {
12551255

1256+
def : Pat<(select (i32 (setne GPR:$rs1, uimm16:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$false),
1257+
(INCT32 (CMPNEI32 GPR:$rs1, uimm16:$rs2), GPR:$false, GPR:$rx, uimm5:$imm)>;
1258+
def : Pat<(select (i32 (seteq GPR:$rs1, uimm16:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$false),
1259+
(INCF32 (CMPNEI32 GPR:$rs1, uimm16:$rs2), GPR:$false, GPR:$rx, uimm5:$imm)>;
1260+
1261+
multiclass INCTF32Pat0<PatFrag cond0, PatFrag cond1, Instruction cmp> {
1262+
def : Pat<(select (i32 (cond0 GPR:$rs1, oimm16:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$other),
1263+
(INCT32 (cmp GPR:$rs1, oimm16:$rs2), GPR:$other, GPR:$rx, uimm5:$imm)>;
1264+
def : Pat<(select (i32 (cond1 GPR:$rs1, oimm16:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$other),
1265+
(INCF32 (cmp GPR:$rs1, oimm16:$rs2), GPR:$other, GPR:$rx, uimm5:$imm)>;
1266+
def : Pat<(select (i32 (cond0 GPR:$rs1, oimm16:$rs2)), GPR:$other, (add GPR:$rx, uimm5:$imm)),
1267+
(INCF32 (cmp GPR:$rs1, oimm16:$rs2), GPR:$other, GPR:$rx, uimm5:$imm)>;
1268+
def : Pat<(select (i32 (cond1 GPR:$rs1, oimm16:$rs2)), GPR:$other, (add GPR:$rx, uimm5:$imm)),
1269+
(INCT32 (cmp GPR:$rs1, oimm16:$rs2), GPR:$other, GPR:$rx, uimm5:$imm)>;
1270+
}
1271+
1272+
defm : INCTF32Pat0<setuge, setult, CMPHSI32>;
1273+
defm : INCTF32Pat0<setlt, setge, CMPLTI32>;
1274+
1275+
def : Pat<(select CARRY:$ca, (add GPR:$rx, uimm5:$imm), GPR:$false),
1276+
(INCT32 CARRY:$ca, GPR:$false, GPR:$rx, uimm5:$imm)>;
1277+
def : Pat<(select CARRY:$ca, GPR:$true, (add GPR:$rx, uimm5:$imm)),
1278+
(INCF32 CARRY:$ca, GPR:$true, GPR:$rx, uimm5:$imm)>;
1279+
def : Pat<(select (and CARRY:$ca, 1), (add GPR:$rx, uimm5:$imm), GPR:$false),
1280+
(INCT32 CARRY:$ca, GPR:$false, GPR:$rx, uimm5:$imm)>;
1281+
def : Pat<(select (and CARRY:$ca, 1), GPR:$true, (add GPR:$rx, uimm5:$imm)),
1282+
(INCF32 CARRY:$ca, GPR:$true, GPR:$rx, uimm5:$imm)>;
1283+
12561284
def : Pat<(select CARRY:$ca, GPR:$rx, GPR:$false),
12571285
(MOVT32 CARRY:$ca, GPR:$rx, GPR:$false)>;
12581286
def : Pat<(select (and CARRY:$ca, 1), GPR:$rx, GPR:$false),
@@ -1277,6 +1305,27 @@ def : Pat<(select (and CARRY:$ca, 1), GPR:$rx, GPR:$false),
12771305

12781306

12791307
let Predicates = [iHas2E3] in {
1308+
def : Pat<(select (i32 (setne GPR:$rs1, GPR:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$false),
1309+
(INCT32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$false, GPR:$rx, uimm5:$imm)>;
1310+
def : Pat<(select (i32 (seteq GPR:$rs1, GPR:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$false),
1311+
(INCF32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$false, GPR:$rx, uimm5:$imm)>;
1312+
1313+
multiclass INCTF32Pat1<PatFrag cond0, PatFrag cond1, Instruction cmp, Instruction incdec0,
1314+
Instruction incdec1> {
1315+
def : Pat<(select (i32 (cond0 GPR:$rs1, GPR:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$other),
1316+
(incdec0 (cmp GPR:$rs1, GPR:$rs2), GPR:$other, GPR:$rx, uimm5:$imm)>;
1317+
def : Pat<(select (i32 (cond0 GPR:$rs1, GPR:$rs2)), GPR:$other, (add GPR:$rx, uimm5:$imm)),
1318+
(incdec1 (cmp GPR:$rs1, GPR:$rs2), GPR:$other, GPR:$rx, uimm5:$imm)>;
1319+
def : Pat<(select (i32 (cond1 GPR:$rs1, GPR:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$other),
1320+
(incdec0 (cmp GPR:$rs2, GPR:$rs1), GPR:$other, GPR:$rx, uimm5:$imm)>;
1321+
def : Pat<(select (i32 (cond1 GPR:$rs1, GPR:$rs2)), GPR:$other, (add GPR:$rx, uimm5:$imm)),
1322+
(incdec1 (cmp GPR:$rs2, GPR:$rs1), GPR:$other, GPR:$rx, uimm5:$imm)>;
1323+
}
1324+
1325+
defm : INCTF32Pat1<setuge, setule, CMPHS32, INCT32, INCF32>;
1326+
defm : INCTF32Pat1<setult, setugt, CMPHS32, INCF32, INCT32>;
1327+
defm : INCTF32Pat1<setlt, setgt, CMPLT32, INCT32, INCF32>;
1328+
defm : INCTF32Pat1<setge, setle, CMPLT32, INCF32, INCT32>;
12801329

12811330
def : Pat<(select (i32 (setne GPR:$rs1, GPR:$rs2)), GPR:$rx, GPR:$false),
12821331
(MOVT32 (CMPNE32 GPR:$rs1, GPR:$rs2), GPR:$rx, GPR:$false)>;

‎llvm/test/CodeGen/CSKY/inct-incf.ll

Lines changed: 23 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -4,9 +4,8 @@
44
define i32 @select_by_icmp_ugt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
55
; CHECK-LABEL: select_by_icmp_ugt:
66
; CHECK: # %bb.0:
7-
; CHECK-NEXT: addi16 a2, 10
87
; CHECK-NEXT: cmphs16 a1, a0
9-
; CHECK-NEXT: movf32 a3, a2
8+
; CHECK-NEXT: incf32 a3, a2, 10
109
; CHECK-NEXT: mov16 a0, a3
1110
; CHECK-NEXT: rts16
1211
%t4 = icmp ugt i32 %t0, %t1
@@ -18,9 +17,8 @@ define i32 @select_by_icmp_ugt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
1817
define i32 @select_by_icmp_sgt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
1918
; CHECK-LABEL: select_by_icmp_sgt:
2019
; CHECK: # %bb.0:
21-
; CHECK-NEXT: addi16 a2, 10
2220
; CHECK-NEXT: cmplt16 a1, a0
23-
; CHECK-NEXT: movt32 a3, a2
21+
; CHECK-NEXT: inct32 a3, a2, 10
2422
; CHECK-NEXT: mov16 a0, a3
2523
; CHECK-NEXT: rts16
2624
%t4 = icmp sgt i32 %t0, %t1
@@ -32,9 +30,8 @@ define i32 @select_by_icmp_sgt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
3230
define i32 @select_by_icmp_uge(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
3331
; CHECK-LABEL: select_by_icmp_uge:
3432
; CHECK: # %bb.0:
35-
; CHECK-NEXT: addi16 a2, 10
3633
; CHECK-NEXT: cmphs16 a0, a1
37-
; CHECK-NEXT: movt32 a3, a2
34+
; CHECK-NEXT: inct32 a3, a2, 10
3835
; CHECK-NEXT: mov16 a0, a3
3936
; CHECK-NEXT: rts16
4037
%t4 = icmp uge i32 %t0, %t1
@@ -46,9 +43,8 @@ define i32 @select_by_icmp_uge(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
4643
define i32 @select_by_icmp_sge(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
4744
; CHECK-LABEL: select_by_icmp_sge:
4845
; CHECK: # %bb.0:
49-
; CHECK-NEXT: addi16 a2, 10
5046
; CHECK-NEXT: cmplt16 a0, a1
51-
; CHECK-NEXT: movf32 a3, a2
47+
; CHECK-NEXT: incf32 a3, a2, 10
5248
; CHECK-NEXT: mov16 a0, a3
5349
; CHECK-NEXT: rts16
5450
%t4 = icmp sge i32 %t0, %t1
@@ -60,9 +56,8 @@ define i32 @select_by_icmp_sge(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
6056
define i32 @select_by_icmp_ult(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
6157
; CHECK-LABEL: select_by_icmp_ult:
6258
; CHECK: # %bb.0:
63-
; CHECK-NEXT: addi16 a2, 10
6459
; CHECK-NEXT: cmphs16 a0, a1
65-
; CHECK-NEXT: movf32 a3, a2
60+
; CHECK-NEXT: incf32 a3, a2, 10
6661
; CHECK-NEXT: mov16 a0, a3
6762
; CHECK-NEXT: rts16
6863
%t4 = icmp ult i32 %t0, %t1
@@ -74,9 +69,8 @@ define i32 @select_by_icmp_ult(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
7469
define i32 @select_by_icmp_slt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
7570
; CHECK-LABEL: select_by_icmp_slt:
7671
; CHECK: # %bb.0:
77-
; CHECK-NEXT: addi16 a2, 10
7872
; CHECK-NEXT: cmplt16 a0, a1
79-
; CHECK-NEXT: movt32 a3, a2
73+
; CHECK-NEXT: inct32 a3, a2, 10
8074
; CHECK-NEXT: mov16 a0, a3
8175
; CHECK-NEXT: rts16
8276
%t4 = icmp slt i32 %t0, %t1
@@ -88,9 +82,8 @@ define i32 @select_by_icmp_slt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
8882
define i32 @select_by_icmp_ule(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
8983
; CHECK-LABEL: select_by_icmp_ule:
9084
; CHECK: # %bb.0:
91-
; CHECK-NEXT: addi16 a2, 10
9285
; CHECK-NEXT: cmphs16 a1, a0
93-
; CHECK-NEXT: movt32 a3, a2
86+
; CHECK-NEXT: inct32 a3, a2, 10
9487
; CHECK-NEXT: mov16 a0, a3
9588
; CHECK-NEXT: rts16
9689
%t4 = icmp ule i32 %t0, %t1
@@ -102,9 +95,8 @@ define i32 @select_by_icmp_ule(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
10295
define i32 @select_by_icmp_sle(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
10396
; CHECK-LABEL: select_by_icmp_sle:
10497
; CHECK: # %bb.0:
105-
; CHECK-NEXT: addi16 a2, 10
10698
; CHECK-NEXT: cmplt16 a1, a0
107-
; CHECK-NEXT: movf32 a3, a2
99+
; CHECK-NEXT: incf32 a3, a2, 10
108100
; CHECK-NEXT: mov16 a0, a3
109101
; CHECK-NEXT: rts16
110102
%t4 = icmp sle i32 %t0, %t1
@@ -116,9 +108,8 @@ define i32 @select_by_icmp_sle(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
116108
define i32 @select_by_icmp_ne(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
117109
; CHECK-LABEL: select_by_icmp_ne:
118110
; CHECK: # %bb.0:
119-
; CHECK-NEXT: addi16 a2, 10
120111
; CHECK-NEXT: cmpne16 a0, a1
121-
; CHECK-NEXT: movt32 a3, a2
112+
; CHECK-NEXT: inct32 a3, a2, 10
122113
; CHECK-NEXT: mov16 a0, a3
123114
; CHECK-NEXT: rts16
124115
%t4 = icmp ne i32 %t0, %t1
@@ -130,9 +121,8 @@ define i32 @select_by_icmp_ne(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
130121
define i32 @select_by_icmp_eq(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
131122
; CHECK-LABEL: select_by_icmp_eq:
132123
; CHECK: # %bb.0:
133-
; CHECK-NEXT: addi16 a2, 10
134124
; CHECK-NEXT: cmpne16 a0, a1
135-
; CHECK-NEXT: movf32 a3, a2
125+
; CHECK-NEXT: incf32 a3, a2, 10
136126
; CHECK-NEXT: mov16 a0, a3
137127
; CHECK-NEXT: rts16
138128
%t4 = icmp eq i32 %t0, %t1
@@ -144,10 +134,9 @@ define i32 @select_by_icmp_eq(i32 %t0, i32 %t1, i32 %t2, i32 %t3) {
144134
define i32 @select_by_icmp_ugt_imm(i32 %t0, i32 %t2, i32 %t3) {
145135
; CHECK-LABEL: select_by_icmp_ugt_imm:
146136
; CHECK: # %bb.0:
147-
; CHECK-NEXT: addi16 a1, 10
148137
; CHECK-NEXT: movi16 a3, 128
149138
; CHECK-NEXT: cmphs16 a3, a0
150-
; CHECK-NEXT: movf32 a2, a1
139+
; CHECK-NEXT: incf32 a2, a1, 10
151140
; CHECK-NEXT: mov16 a0, a2
152141
; CHECK-NEXT: rts16
153142
%t4 = icmp ugt i32 %t0, 128
@@ -159,10 +148,9 @@ define i32 @select_by_icmp_ugt_imm(i32 %t0, i32 %t2, i32 %t3) {
159148
define i32 @select_by_icmp_sgt_imm(i32 %t0, i32 %t2, i32 %t3) {
160149
; CHECK-LABEL: select_by_icmp_sgt_imm:
161150
; CHECK: # %bb.0:
162-
; CHECK-NEXT: addi16 a1, 10
163151
; CHECK-NEXT: movi16 a3, 128
164152
; CHECK-NEXT: cmplt16 a3, a0
165-
; CHECK-NEXT: movt32 a2, a1
153+
; CHECK-NEXT: inct32 a2, a1, 10
166154
; CHECK-NEXT: mov16 a0, a2
167155
; CHECK-NEXT: rts16
168156
%t4 = icmp sgt i32 %t0, 128
@@ -174,10 +162,9 @@ define i32 @select_by_icmp_sgt_imm(i32 %t0, i32 %t2, i32 %t3) {
174162
define i32 @select_by_icmp_uge_imm(i32 %t0, i32 %t2, i32 %t3) {
175163
; CHECK-LABEL: select_by_icmp_uge_imm:
176164
; CHECK: # %bb.0:
177-
; CHECK-NEXT: addi16 a1, 10
178165
; CHECK-NEXT: movi16 a3, 127
179166
; CHECK-NEXT: cmphs16 a3, a0
180-
; CHECK-NEXT: movf32 a2, a1
167+
; CHECK-NEXT: incf32 a2, a1, 10
181168
; CHECK-NEXT: mov16 a0, a2
182169
; CHECK-NEXT: rts16
183170
%t4 = icmp uge i32 %t0, 128
@@ -189,10 +176,9 @@ define i32 @select_by_icmp_uge_imm(i32 %t0, i32 %t2, i32 %t3) {
189176
define i32 @select_by_icmp_sge_imm(i32 %t0, i32 %t2, i32 %t3) {
190177
; CHECK-LABEL: select_by_icmp_sge_imm:
191178
; CHECK: # %bb.0:
192-
; CHECK-NEXT: addi16 a1, 10
193179
; CHECK-NEXT: movi16 a3, 127
194180
; CHECK-NEXT: cmplt16 a3, a0
195-
; CHECK-NEXT: movt32 a2, a1
181+
; CHECK-NEXT: inct32 a2, a1, 10
196182
; CHECK-NEXT: mov16 a0, a2
197183
; CHECK-NEXT: rts16
198184
%t4 = icmp sge i32 %t0, 128
@@ -204,9 +190,8 @@ define i32 @select_by_icmp_sge_imm(i32 %t0, i32 %t2, i32 %t3) {
204190
define i32 @select_by_icmp_ult_imm(i32 %t0, i32 %t2, i32 %t3) {
205191
; CHECK-LABEL: select_by_icmp_ult_imm:
206192
; CHECK: # %bb.0:
207-
; CHECK-NEXT: addi16 a1, 10
208193
; CHECK-NEXT: cmphsi32 a0, 128
209-
; CHECK-NEXT: movf32 a2, a1
194+
; CHECK-NEXT: incf32 a2, a1, 10
210195
; CHECK-NEXT: mov16 a0, a2
211196
; CHECK-NEXT: rts16
212197
%t4 = icmp ult i32 %t0, 128
@@ -218,9 +203,8 @@ define i32 @select_by_icmp_ult_imm(i32 %t0, i32 %t2, i32 %t3) {
218203
define i32 @select_by_icmp_slt_imm(i32 %t0, i32 %t2, i32 %t3) {
219204
; CHECK-LABEL: select_by_icmp_slt_imm:
220205
; CHECK: # %bb.0:
221-
; CHECK-NEXT: addi16 a1, 10
222206
; CHECK-NEXT: cmplti32 a0, 128
223-
; CHECK-NEXT: movt32 a2, a1
207+
; CHECK-NEXT: inct32 a2, a1, 10
224208
; CHECK-NEXT: mov16 a0, a2
225209
; CHECK-NEXT: rts16
226210
%t4 = icmp slt i32 %t0, 128
@@ -232,9 +216,8 @@ define i32 @select_by_icmp_slt_imm(i32 %t0, i32 %t2, i32 %t3) {
232216
define i32 @select_by_icmp_ule_imm(i32 %t0, i32 %t2, i32 %t3) {
233217
; CHECK-LABEL: select_by_icmp_ule_imm:
234218
; CHECK: # %bb.0:
235-
; CHECK-NEXT: addi16 a1, 10
236219
; CHECK-NEXT: cmphsi32 a0, 129
237-
; CHECK-NEXT: movf32 a2, a1
220+
; CHECK-NEXT: incf32 a2, a1, 10
238221
; CHECK-NEXT: mov16 a0, a2
239222
; CHECK-NEXT: rts16
240223
%t4 = icmp ule i32 %t0, 128
@@ -246,9 +229,8 @@ define i32 @select_by_icmp_ule_imm(i32 %t0, i32 %t2, i32 %t3) {
246229
define i32 @select_by_icmp_sle_imm(i32 %t0, i32 %t2, i32 %t3) {
247230
; CHECK-LABEL: select_by_icmp_sle_imm:
248231
; CHECK: # %bb.0:
249-
; CHECK-NEXT: addi16 a1, 10
250232
; CHECK-NEXT: cmplti32 a0, 129
251-
; CHECK-NEXT: movt32 a2, a1
233+
; CHECK-NEXT: inct32 a2, a1, 10
252234
; CHECK-NEXT: mov16 a0, a2
253235
; CHECK-NEXT: rts16
254236
%t4 = icmp sle i32 %t0, 128
@@ -260,9 +242,8 @@ define i32 @select_by_icmp_sle_imm(i32 %t0, i32 %t2, i32 %t3) {
260242
define i32 @select_by_icmp_ne_imm(i32 %t0, i32 %t2, i32 %t3) {
261243
; CHECK-LABEL: select_by_icmp_ne_imm:
262244
; CHECK: # %bb.0:
263-
; CHECK-NEXT: addi16 a1, 10
264245
; CHECK-NEXT: cmpnei32 a0, 128
265-
; CHECK-NEXT: movt32 a2, a1
246+
; CHECK-NEXT: inct32 a2, a1, 10
266247
; CHECK-NEXT: mov16 a0, a2
267248
; CHECK-NEXT: rts16
268249
%t4 = icmp ne i32 %t0, 128
@@ -274,9 +255,8 @@ define i32 @select_by_icmp_ne_imm(i32 %t0, i32 %t2, i32 %t3) {
274255
define i32 @select_by_icmp_eq_imm(i32 %t0, i32 %t2, i32 %t3) {
275256
; CHECK-LABEL: select_by_icmp_eq_imm:
276257
; CHECK: # %bb.0:
277-
; CHECK-NEXT: addi16 a1, 10
278258
; CHECK-NEXT: cmpnei32 a0, 128
279-
; CHECK-NEXT: movf32 a2, a1
259+
; CHECK-NEXT: incf32 a2, a1, 10
280260
; CHECK-NEXT: mov16 a0, a2
281261
; CHECK-NEXT: rts16
282262
%t4 = icmp eq i32 %t0, 128
@@ -300,9 +280,8 @@ define i32 @select_by_call_t(i32 %t0, i32 %t1, i32 %t2) {
300280
; CHECK-NEXT: mov16 l0, a2
301281
; CHECK-NEXT: mov16 l1, a1
302282
; CHECK-NEXT: jsri32 [.LCPI20_0]
303-
; CHECK-NEXT: addi32 a1, l1, 10
304283
; CHECK-NEXT: btsti16 a0, 0
305-
; CHECK-NEXT: movt32 l0, a1
284+
; CHECK-NEXT: inct32 l0, l1, 10
306285
; CHECK-NEXT: mov16 a0, l0
307286
; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
308287
; CHECK-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
@@ -335,10 +314,9 @@ define i32 @select_by_call_f(i32 %t0, i32 %t1, i32 %t2) {
335314
; CHECK-NEXT: mov16 l0, a2
336315
; CHECK-NEXT: mov16 l1, a1
337316
; CHECK-NEXT: jsri32 [.LCPI21_0]
338-
; CHECK-NEXT: addi32 a1, l1, 10
339317
; CHECK-NEXT: btsti16 a0, 0
340-
; CHECK-NEXT: movt32 a1, l0
341-
; CHECK-NEXT: mov16 a0, a1
318+
; CHECK-NEXT: incf32 l0, l1, 10
319+
; CHECK-NEXT: mov16 a0, l0
342320
; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
343321
; CHECK-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
344322
; CHECK-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload

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