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fixup: add a missing CHECK line
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llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll

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Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -verify-machineinstrs < %s | FileCheck %s
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target triple = "aarch64-linux"
@@ -36,6 +36,7 @@ target triple = "aarch64-linux"
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; CHECK-NEXT: .byte 255
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; CHECK-NEXT: .byte 255
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; CHECK-NEXT: .byte 255
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; CHECK-NEXT: .byte 3
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define void @sitofp_v8i8_to_v8f32(ptr %src, ptr %dst) {
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; CHECK-LABEL: sitofp_v8i8_to_v8f32:

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