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[X86][test] Add MRM7r/MRM7m entries in evex format enc/dec tests
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+30
-3
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llvm/test/MC/Disassembler/X86/apx/evex-format.txt

Lines changed: 10 additions & 1 deletion
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@@ -1,4 +1,3 @@
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## NOTE: This file needs to be updated after promoted instruction is supported
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# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
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# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
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@@ -98,6 +97,10 @@
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# INTEL: vpslldq zmm0, zmmword ptr [r16 + r17], 0
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0x62,0xf9,0x79,0x48,0x73,0x3c,0x08,0x00
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# ATT: sarq $123, 291(%r16,%r17), %r18
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# INTEL: sar r18, qword ptr [r16 + r17 + 291], 123
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0x62,0xfc,0xe8,0x10,0xc1,0xbc,0x08,0x23,0x01,0x00,0x00,0x7b
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## MRMDestMem4VOp3CC
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# ATT: cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
@@ -174,6 +177,12 @@
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# INTEL: xor r17, r16, 127
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0x62,0xfc,0xf4,0x10,0x83,0xf0,0x7f
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## MRM7r
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# ATT: sarq $123, %r16, %r17
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# INTEL: sar r17, r16, 123
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0x62,0xfc,0xf4,0x10,0xc1,0xf8,0x7b
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## NoCD8
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# ATT: {nf} negq 123(%r16)

llvm/test/MC/X86/apx/evex-format-att.s

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
## NOTE: This file needs to be updated after promoted instruction is supported
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# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
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## MRMDestMem
@@ -97,6 +96,10 @@
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# CHECK: encoding: [0x62,0xf9,0x79,0x48,0x73,0x3c,0x08,0x00]
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vpslldq $0, (%r16,%r17), %zmm0
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# CHECK: sarq $123, 291(%r16,%r17), %r18
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# CHECK: encoding: [0x62,0xfc,0xe8,0x10,0xc1,0xbc,0x08,0x23,0x01,0x00,0x00,0x7b]
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sarq $123, 291(%r16,%r17), %r18
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## MRMDestMem4VOp3CC
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# CHECK: cmpbexadd %r18d, %r22d, 291(%r28,%r29,4)
@@ -173,6 +176,12 @@
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# CHECK: encoding: [0x62,0xfc,0xf4,0x10,0x83,0xf0,0x7f]
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xorq $127, %r16, %r17
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## MRM7r
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# CHECK: sarq $123, %r16, %r17
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# CHECK: encoding: [0x62,0xfc,0xf4,0x10,0xc1,0xf8,0x7b]
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sarq $123, %r16, %r17
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## NoCD8
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# CHECK: {nf} negq 123(%r16)

llvm/test/MC/X86/apx/evex-format-intel.s

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
## NOTE: This file needs to be updated after promoted instruction is supported
21
# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
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## MRMDestMem
@@ -97,6 +96,10 @@
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# CHECK: encoding: [0x62,0xf9,0x79,0x48,0x73,0x3c,0x08,0x00]
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vpslldq zmm0, zmmword ptr [r16 + r17], 0
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# CHECK: sar r18, qword ptr [r16 + r17 + 291], 123
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# CHECK: encoding: [0x62,0xfc,0xe8,0x10,0xc1,0xbc,0x08,0x23,0x01,0x00,0x00,0x7b]
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sar r18, qword ptr [r16 + r17 + 291], 123
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## MRMDestMem4VOp3CC
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# CHECK: cmpbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
@@ -173,6 +176,12 @@
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# CHECK: encoding: [0x62,0xfc,0xf4,0x10,0x83,0xf0,0x7f]
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xor r17, r16, 127
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## MRM7r
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# CHECK: sar r17, r16, 123
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# CHECK: encoding: [0x62,0xfc,0xf4,0x10,0xc1,0xf8,0x7b]
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sar r17, r16, 123
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## NoCD8
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# CHECK: {nf} neg qword ptr [r16 + 123]

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