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[SPIRV] Fix SPV_KHR_expect_assume support (#67793)
Since efe0e10 changes in tests are required. Need to add extension to Extensions list and command line to enable use of the extension for test runs.
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7 files changed

+52
-27
lines changed

7 files changed

+52
-27
lines changed

llvm/lib/Target/SPIRV/SPIRV.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ class SPIRVSubtarget;
1919
class InstructionSelector;
2020
class RegisterBankInfo;
2121

22-
ModulePass *createSPIRVPrepareFunctionsPass();
22+
ModulePass *createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM);
2323
FunctionPass *createSPIRVRegularizerPass();
2424
FunctionPass *createSPIRVPreLegalizerPass();
2525
FunctionPass *createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM);

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
//
1313
//===----------------------------------------------------------------------===//
1414

15+
#include "MCTargetDesc/SPIRVBaseInfo.h"
1516
#include "MCTargetDesc/SPIRVMCTargetDesc.h"
1617
#include "SPIRV.h"
1718
#include "SPIRVGlobalRegistry.h"
@@ -1410,15 +1411,17 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
14101411
case Intrinsic::spv_alloca:
14111412
return selectFrameIndex(ResVReg, ResType, I);
14121413
case Intrinsic::spv_assume:
1413-
BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
1414-
.addUse(I.getOperand(1).getReg());
1414+
if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
1415+
BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
1416+
.addUse(I.getOperand(1).getReg());
14151417
break;
14161418
case Intrinsic::spv_expect:
1417-
BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR))
1418-
.addDef(ResVReg)
1419-
.addUse(GR.getSPIRVTypeID(ResType))
1420-
.addUse(I.getOperand(2).getReg())
1421-
.addUse(I.getOperand(3).getReg());
1419+
if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
1420+
BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR))
1421+
.addDef(ResVReg)
1422+
.addUse(GR.getSPIRVTypeID(ResType))
1423+
.addUse(I.getOperand(2).getReg())
1424+
.addUse(I.getOperand(3).getReg());
14221425
break;
14231426
default:
14241427
llvm_unreachable("Intrinsic selection not implemented");

llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
//===----------------------------------------------------------------------===//
2020

2121
#include "SPIRV.h"
22+
#include "SPIRVSubtarget.h"
2223
#include "SPIRVTargetMachine.h"
2324
#include "SPIRVUtils.h"
2425
#include "llvm/CodeGen/IntrinsicLowering.h"
@@ -38,12 +39,13 @@ void initializeSPIRVPrepareFunctionsPass(PassRegistry &);
3839
namespace {
3940

4041
class SPIRVPrepareFunctions : public ModulePass {
42+
const SPIRVTargetMachine &TM;
4143
bool substituteIntrinsicCalls(Function *F);
4244
Function *removeAggregateTypesFromSignature(Function *F);
4345

4446
public:
4547
static char ID;
46-
SPIRVPrepareFunctions() : ModulePass(ID) {
48+
SPIRVPrepareFunctions(const SPIRVTargetMachine &TM) : ModulePass(ID), TM(TM) {
4749
initializeSPIRVPrepareFunctionsPass(*PassRegistry::getPassRegistry());
4850
}
4951

@@ -300,7 +302,9 @@ bool SPIRVPrepareFunctions::substituteIntrinsicCalls(Function *F) {
300302
Changed = true;
301303
} else if (II->getIntrinsicID() == Intrinsic::assume ||
302304
II->getIntrinsicID() == Intrinsic::expect) {
303-
lowerExpectAssume(II);
305+
const SPIRVSubtarget &STI = TM.getSubtarget<SPIRVSubtarget>(*F);
306+
if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
307+
lowerExpectAssume(II);
304308
Changed = true;
305309
}
306310
}
@@ -394,6 +398,7 @@ bool SPIRVPrepareFunctions::runOnModule(Module &M) {
394398
return Changed;
395399
}
396400

397-
ModulePass *llvm::createSPIRVPrepareFunctionsPass() {
398-
return new SPIRVPrepareFunctions();
401+
ModulePass *
402+
llvm::createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM) {
403+
return new SPIRVPrepareFunctions(TM);
399404
}

llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,10 @@ cl::list<SPIRV::Extension::Extension> Extensions(
4141
"SPV_KHR_no_integer_wrap_decoration",
4242
"Adds decorations to indicate that a given instruction does "
4343
"not cause integer wrapping"),
44+
clEnumValN(SPIRV::Extension::SPV_KHR_expect_assume,
45+
"SPV_KHR_expect_assume",
46+
"Provides additional information to a compiler, similar to "
47+
"the llvm.assume and llvm.expect intrinsics."),
4448
clEnumValN(SPIRV::Extension::SPV_KHR_bit_instructions,
4549
"SPV_KHR_bit_instructions",
4650
"This enables bit instructions to be used by SPIR-V modules "

llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ namespace {
9090
class SPIRVPassConfig : public TargetPassConfig {
9191
public:
9292
SPIRVPassConfig(SPIRVTargetMachine &TM, PassManagerBase &PM)
93-
: TargetPassConfig(TM, PM) {}
93+
: TargetPassConfig(TM, PM), TM(TM) {}
9494

9595
SPIRVTargetMachine &getSPIRVTargetMachine() const {
9696
return getTM<SPIRVTargetMachine>();
@@ -109,6 +109,9 @@ class SPIRVPassConfig : public TargetPassConfig {
109109
void addOptimizedRegAlloc() override {}
110110

111111
void addPostRegAlloc() override;
112+
113+
private:
114+
const SPIRVTargetMachine &TM;
112115
};
113116
} // namespace
114117

@@ -150,7 +153,7 @@ TargetPassConfig *SPIRVTargetMachine::createPassConfig(PassManagerBase &PM) {
150153
void SPIRVPassConfig::addIRPasses() {
151154
TargetPassConfig::addIRPasses();
152155
addPass(createSPIRVRegularizerPass());
153-
addPass(createSPIRVPrepareFunctionsPass());
156+
addPass(createSPIRVPrepareFunctionsPass(TM));
154157
}
155158

156159
void SPIRVPassConfig::addISelPrepare() {

llvm/test/CodeGen/SPIRV/assume.ll

Lines changed: 13 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,20 @@
1-
; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
2-
; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck %s
1+
; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=EXT,CHECK %s
2+
; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=EXT,CHECK %s
3+
; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefixes=NOEXT,CHECK %s
4+
; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefixes=NOEXT,CHECK %s
35

4-
; CHECK: OpCapability ExpectAssumeKHR
5-
; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
6+
; EXT: OpCapability ExpectAssumeKHR
7+
; EXT-NEXT: OpExtension "SPV_KHR_expect_assume"
8+
; NOEXT-NOT: OpCapability ExpectAssumeKHR
9+
; NOEXT-NOT: OpExtension "SPV_KHR_expect_assume"
610

711
declare void @llvm.assume(i1)
812

9-
; CHECK-DAG: %9 = OpIEqual %5 %6 %7
10-
; CHECK-NEXT: OpAssumeTrueKHR %9
11-
define void @assumeeq(i32 %x, i32 %y) {
13+
; CHECK-DAG: %8 = OpIEqual %3 %5 %6
14+
; EXT: OpAssumeTrueKHR %8
15+
; NOEXT-NOT: OpAssumeTrueKHR %8
16+
define i1 @assumeeq(i32 %x, i32 %y) {
1217
%cmp = icmp eq i32 %x, %y
1318
call void @llvm.assume(i1 %cmp)
14-
ret void
19+
ret i1 %cmp
1520
}

llvm/test/CodeGen/SPIRV/expect.ll

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,21 @@
1-
; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
2-
; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck %s
1+
; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=CHECK,EXT %s
2+
; RUN: llc -mtriple=spirv64-unknown-unknown --spirv-extensions=SPV_KHR_expect_assume < %s | FileCheck --check-prefixes=CHECK,EXT %s
3+
; RUN: llc -mtriple=spirv32-unknown-unknown < %s | FileCheck --check-prefixes=CHECK,NOEXT %s
4+
; RUN: llc -mtriple=spirv64-unknown-unknown < %s | FileCheck --check-prefixes=CHECK,NOEXT %s
35

4-
; CHECK: OpCapability ExpectAssumeKHR
5-
; CHECK-NEXT: OpExtension "SPV_KHR_expect_assume"
6+
; EXT: OpCapability ExpectAssumeKHR
7+
; EXT-NEXT: OpExtension "SPV_KHR_expect_assume"
8+
; NOEXT-NOT: OpCapability ExpectAssumeKHR
9+
; NOEXT-NOT: OpExtension "SPV_KHR_expect_assume"
610

711
declare i32 @llvm.expect.i32(i32, i32)
812
declare i32 @getOne()
913

1014
; CHECK-DAG: %2 = OpTypeInt 32 0
1115
; CHECK-DAG: %6 = OpFunctionParameter %2
1216
; CHECK-DAG: %9 = OpIMul %2 %6 %8
13-
; CHECK-DAG: %10 = OpExpectKHR %2 %9 %6
17+
; EXT-DAG: %10 = OpExpectKHR %2 %9 %6
18+
; NOEXT-NOT: %10 = OpExpectKHR %2 %9 %6
1419

1520
define i32 @test(i32 %x) {
1621
%one = call i32 @getOne()

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