[lldb] Added check for a generic register:ra and a0-a7

Author: sga-sc

lldb/test/API/tools/lldb-server/TestLldbGdbServer.py

@@ -199,6 +199,14 @@ def test_qRegisterInfo_contains_required_generics_debugserver(self):
         if not self.isRISCV():
             self.assertIn("flags", generic_regs)
 
+        if self.isRISCV():
+            # Special RISC-V register for a return address
+            self.assertIn("ra", generic_regs)
+
+            # RISC-V's function arguments registers
+            for i in range(1, 9):
+                self.assertIn(f"arg{i}", generic_regs)
+
     def test_qRegisterInfo_contains_at_least_one_register_set(self):
         self.build()
         self.prep_debug_monitor_and_inferior()