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Refactor getSameRatioLMUL so we can reuse it, add setVLMul accessor
1 parent 42cfa2a commit 8e773f8

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4 files changed

+16
-19
lines changed

4 files changed

+16
-19
lines changed

llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -212,9 +212,10 @@ getEEWAndEMULForUnitStrideLoadStore(unsigned Opcode, RISCVII::VLMUL LMUL,
212212
llvm_unreachable("Opcode is not a vector unit stride load nor store");
213213
}
214214

215-
uint8_t EMUL =
216-
static_cast<uint8_t>(RISCVVType::getSameRatioLMUL(SEW, LMUL, EEW));
217-
return std::make_pair(EEW, EMUL);
215+
auto EMUL = RISCVVType::getSameRatioLMUL(SEW, LMUL, EEW);
216+
if (!EEW)
217+
llvm_unreachable("Invalid SEW or LMUL for new ratio");
218+
return std::make_pair(EEW, *EMUL);
218219
}
219220

220221
unsigned RISCVInstrumentManager::getSchedClassID(

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -206,12 +206,14 @@ unsigned RISCVVType::getSEWLMULRatio(unsigned SEW, RISCVII::VLMUL VLMul) {
206206
return (SEW * 8) / LMul;
207207
}
208208

209-
RISCVII::VLMUL RISCVVType::getSameRatioLMUL(unsigned SEW, RISCVII::VLMUL VLMUL,
210-
unsigned EEW) {
209+
std::optional<RISCVII::VLMUL>
210+
RISCVVType::getSameRatioLMUL(unsigned SEW, RISCVII::VLMUL VLMUL, unsigned EEW) {
211211
unsigned Ratio = RISCVVType::getSEWLMULRatio(SEW, VLMUL);
212212
unsigned EMULFixedPoint = (EEW * 8) / Ratio;
213213
bool Fractional = EMULFixedPoint < 8;
214214
unsigned EMUL = Fractional ? 8 / EMULFixedPoint : EMULFixedPoint / 8;
215+
if (!isValidLMUL(EMUL, Fractional))
216+
return std::nullopt;
215217
return RISCVVType::encodeLMUL(EMUL, Fractional);
216218
}
217219

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -535,8 +535,8 @@ void printVType(unsigned VType, raw_ostream &OS);
535535

536536
unsigned getSEWLMULRatio(unsigned SEW, RISCVII::VLMUL VLMul);
537537

538-
RISCVII::VLMUL getSameRatioLMUL(unsigned SEW, RISCVII::VLMUL VLMUL,
539-
unsigned EEW);
538+
std::optional<RISCVII::VLMUL>
539+
getSameRatioLMUL(unsigned SEW, RISCVII::VLMUL VLMUL, unsigned EEW);
540540
} // namespace RISCVVType
541541

542542
namespace RISCVRVC {

llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -539,6 +539,8 @@ class VSETVLIInfo {
539539
MaskAgnostic = MA;
540540
}
541541

542+
void setVLMul(RISCVII::VLMUL VLMul) { this->VLMul = VLMul; }
543+
542544
unsigned encodeVTYPE() const {
543545
assert(isValid() && !isUnknown() && !SEWLMULRatioOnly &&
544546
"Can't encode VTYPE for uninitialized or unknown");
@@ -1041,21 +1043,13 @@ void RISCVInsertVSETVLI::transferBefore(VSETVLIInfo &Info,
10411043
// If we don't use LMUL or the SEW/LMUL ratio, then adjust LMUL so that we
10421044
// maintain the SEW/LMUL ratio. This allows us to eliminate VL toggles in more
10431045
// places.
1044-
DemandedFields Demanded = getDemanded(MI, MRI);
1046+
DemandedFields Demanded = getDemanded(MI, MRI, ST);
10451047
if (!Demanded.LMUL && !Demanded.SEWLMULRatio && Info.isValid() &&
10461048
PrevInfo.isValid() && !Info.isUnknown() && !PrevInfo.isUnknown() &&
10471049
!Info.hasSameVLMAX(PrevInfo)) {
1048-
unsigned SEW = Info.getSEW();
1049-
// Fixed point value with 3 fractional bits.
1050-
unsigned NewRatio = (SEW * 8) / PrevInfo.getSEWLMULRatio();
1051-
if (NewRatio >= 1 && NewRatio <= 64) {
1052-
bool Fractional = NewRatio < 8;
1053-
RISCVII::VLMUL NewVLMul = RISCVVType::encodeLMUL(
1054-
Fractional ? 8 / NewRatio : NewRatio / 8, Fractional);
1055-
unsigned VType = Info.encodeVTYPE();
1056-
Info.setVTYPE(NewVLMul, SEW, RISCVVType::isTailAgnostic(VType),
1057-
RISCVVType::isMaskAgnostic(VType));
1058-
}
1050+
if (auto NewVLMul = RISCVVType::getSameRatioLMUL(
1051+
PrevInfo.getSEW(), PrevInfo.getVLMUL(), Info.getSEW()))
1052+
Info.setVLMul(*NewVLMul);
10591053
}
10601054

10611055
// For vmv.s.x and vfmv.s.f, there are only two behaviors, VL = 0 and

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