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5 files changed

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-23
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5 files changed

+27
-23
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clang/include/clang/CIR/Dialect/IR/CIRDialect.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,8 @@ class SameFirstOperandAndResultType
5959

6060
using BuilderCallbackRef =
6161
llvm::function_ref<void(mlir::OpBuilder &, mlir::Location)>;
62+
using BuilderOpStateCallbackRef = llvm::function_ref<void(
63+
mlir::OpBuilder &, mlir::Location, mlir::OperationState &)>;
6264

6365
namespace cir {
6466
void buildTerminatedBody(mlir::OpBuilder &builder, mlir::Location loc);

clang/include/clang/CIR/Dialect/IR/CIROps.td

Lines changed: 13 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -821,14 +821,14 @@ def SwitchOp : CIR_Op<"switch",
821821
operation in the `cir.switch` operation easily.
822822

823823
The `cir.case` operations doesn't have to be in the region of `cir.switch`
824-
directly. However, when all the `cir.case` operations lives in the region
825-
of `cir.switch` directly and there is no other operations except the ending
826-
`cir.yield` operation in the region of `cir.switch` directly, we call the
824+
directly. However, when all the `cir.case` operations live in the region
825+
of `cir.switch` directly and there are no other operations except the ending
826+
`cir.yield` operation in the region of `cir.switch` directly, we say the
827827
`cir.switch` operation is in a simple form. Users can use
828828
`bool isSimpleForm(llvm::SmallVector<CaseOp> &cases)` member function to
829829
detect if the `cir.switch` operation is in a simple form. The simple form
830-
makes analysis easier to handle the `cir.switch` operation
831-
and makes the boundary to give up pretty clear.
830+
makes it easier for analyses to handle the `cir.switch` operation
831+
and makes the boundary to give up clear.
832832

833833
To make the simple form as common as possible, CIR code generation attaches
834834
operations corresponding to the statements that lives between top level
@@ -840,9 +840,8 @@ def SwitchOp : CIR_Op<"switch",
840840
switch(int cond) {
841841
case 4:
842842
a++;
843-
844-
b++;
845-
case 5;
843+
b++;
844+
case 5:
846845
c++;
847846

848847
...
@@ -901,13 +900,13 @@ def SwitchOp : CIR_Op<"switch",
901900
}
902901
```
903902

904-
The cir.switch might not be considered "simple" if any of the following is
903+
The cir.switch is not be considered "simple" if any of the following is
905904
true:
906-
- There are case statements of the switch statement lives in other scopes
905+
- There are case statements of the switch statement that are scope
907906
other than the top level compound statement scope. Note that a case
908907
statement itself doesn't form a scope.
909908
- The sub-statement of the switch statement is not a compound statement.
910-
- There are codes before the first case statement. For example,
909+
- There is any code before the first case statement. For example,
911910

912911
```
913912
switch(int cond) {
@@ -949,7 +948,7 @@ def SwitchOp : CIR_Op<"switch",
949948
let skipDefaultBuilders = 1;
950949
let builders = [
951950
OpBuilder<(ins "mlir::Value":$condition,
952-
"llvm::function_ref<void(mlir::OpBuilder &, mlir::Location, mlir::OperationState &)>":$switchBuilder)>
951+
"BuilderOpStateCallbackRef":$switchBuilder)>
953952
];
954953

955954
let assemblyFormat = [{
@@ -961,12 +960,12 @@ def SwitchOp : CIR_Op<"switch",
961960

962961
let extraClassDeclaration = [{
963962
// Collect cases in the switch.
964-
void collectCases(llvm::SmallVector<CaseOp> &cases);
963+
void collectCases(llvm::SmallVectorImpl<CaseOp> &cases);
965964

966965
// Check if the switch is in a simple form.
967966
// If yes, collect the cases to \param cases.
968967
// This is an expensive and need to be used with caution.
969-
bool isSimpleForm(llvm::SmallVector<CaseOp> &cases);
968+
bool isSimpleForm(llvm::SmallVectorImpl<CaseOp> &cases);
970969
}];
971970
}
972971

clang/include/clang/CIR/MissingFeatures.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -162,6 +162,7 @@ struct MissingFeatures {
162162
static bool moduleNameHash() { return false; }
163163
static bool setDSOLocal() { return false; }
164164
static bool foldCaseStmt() { return false; }
165+
static bool constantFoldSwitchStatement() { return false; }
165166

166167
// Missing types
167168
static bool dataMemberType() { return false; }

clang/lib/CIR/CodeGen/CIRGenStmt.cpp

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -458,8 +458,9 @@ CIRGenFunction::emitCaseDefaultCascade(const T *stmt, mlir::Type condType,
458458
} else if (isa<CaseStmt>(sub) && isa<DefaultStmt>(stmt)) {
459459
subStmtKind = SubStmtKind::Case;
460460
builder.createYield(loc);
461-
} else
461+
} else {
462462
result = emitStmt(sub, /*useCurrentScope=*/!isa<CompoundStmt>(sub));
463+
}
463464

464465
insertPoint = builder.saveInsertionPoint();
465466
}
@@ -496,16 +497,17 @@ CIRGenFunction::emitCaseDefaultCascade(const T *stmt, mlir::Type condType,
496497
//
497498
// We don't need to revert this if we find the current switch can't be in
498499
// simple form later since the conversion itself should be harmless.
499-
if (subStmtKind == SubStmtKind::Case)
500+
if (subStmtKind == SubStmtKind::Case) {
500501
result = emitCaseStmt(*cast<CaseStmt>(sub), condType, buildingTopLevelCase);
501-
else if (subStmtKind == SubStmtKind::Default) {
502+
} else if (subStmtKind == SubStmtKind::Default) {
502503
getCIRGenModule().errorNYI(sub->getSourceRange(), "Default case");
503504
return mlir::failure();
504-
} else if (buildingTopLevelCase)
505+
} else if (buildingTopLevelCase) {
505506
// If we're building a top level case, try to restore the insert point to
506507
// the case we're building, then we can attach more random stmts to the
507508
// case to make generating `cir.switch` operation to be a simple form.
508509
builder.restoreInsertionPoint(insertPoint);
510+
}
509511

510512
return result;
511513
}
@@ -764,6 +766,7 @@ mlir::LogicalResult CIRGenFunction::emitSwitchStmt(const clang::SwitchStmt &s) {
764766
// only emit live cases. CIR should use MLIR to achieve similar things,
765767
// nothing to be done here.
766768
// if (ConstantFoldsToSimpleInteger(S.getCond(), ConstantCondValue))...
769+
assert(!cir::MissingFeatures::constantFoldSwitchStatement());
767770

768771
SwitchOp swop;
769772
auto switchStmtBuilder = [&]() -> mlir::LogicalResult {

clang/lib/CIR/Dialect/IR/CIRDialect.cpp

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -882,9 +882,8 @@ void cir::SwitchOp::getSuccessorRegions(
882882
region.push_back(RegionSuccessor(&getBody()));
883883
}
884884

885-
void cir::SwitchOp::build(
886-
OpBuilder &builder, OperationState &result, Value cond,
887-
function_ref<void(OpBuilder &, Location, OperationState &)> switchBuilder) {
885+
void cir::SwitchOp::build(OpBuilder &builder, OperationState &result,
886+
Value cond, BuilderOpStateCallbackRef switchBuilder) {
888887
assert(switchBuilder && "the builder callback for regions must be present");
889888
OpBuilder::InsertionGuard guardSwitch(builder);
890889
Region *switchRegion = result.addRegion();
@@ -893,7 +892,7 @@ void cir::SwitchOp::build(
893892
switchBuilder(builder, result.location, result);
894893
}
895894

896-
void cir::SwitchOp::collectCases(llvm::SmallVector<CaseOp> &cases) {
895+
void cir::SwitchOp::collectCases(llvm::SmallVectorImpl<CaseOp> &cases) {
897896
walk<mlir::WalkOrder::PreOrder>([&](mlir::Operation *op) {
898897
// Don't walk in nested switch op.
899898
if (isa<cir::SwitchOp>(op) && op != *this)
@@ -906,7 +905,7 @@ void cir::SwitchOp::collectCases(llvm::SmallVector<CaseOp> &cases) {
906905
});
907906
}
908907

909-
bool cir::SwitchOp::isSimpleForm(llvm::SmallVector<CaseOp> &cases) {
908+
bool cir::SwitchOp::isSimpleForm(llvm::SmallVectorImpl<CaseOp> &cases) {
910909
collectCases(cases);
911910

912911
if (getBody().empty())

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