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AMDGPU: MC support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32}
Co-authored-by: Shilei Tian <[email protected]>
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‎llvm/lib/Target/AMDGPU/SIInstrInfo.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2852,6 +2852,9 @@ def VOP_I32_V2F16_F32_F32 : VOPProfile<[i32, v2f16, f32, f32]>;
28522852
def VOP_I32_V2BF16_F32_F32: VOPProfile<[i32, v2bf16, f32, f32]>;
28532853
def VOP_BF16_F32_I32 : VOPProfile<[bf16, f32, i32, untyped]>;
28542854
def VOP_F16_F32_I32 : VOPProfile<[f16, f32, i32, untyped]>;
2855+
def VOP_I32_BF16_I32_F32 : VOPProfile<[i32, bf16, i32, f32]>;
2856+
def VOP_I32_F16_I32_F32 : VOPProfile<[i32, f16, i32, f32]>;
2857+
def VOP_I32_F32_I32_F32 : VOPProfile<[i32, f32, i32, f32]>;
28552858

28562859
def VOP_I64_I64_I32 : VOPProfile <[i64, i64, i32, untyped]>;
28572860
def VOP_I64_I32_I64 : VOPProfile <[i64, i32, i64, untyped]>;

‎llvm/lib/Target/AMDGPU/VOP3Instructions.td

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -967,6 +967,14 @@ class VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<VOPProfile P> : VOP3_Profil
967967
let HasOMod = 0;
968968
}
969969

970+
class VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOPProfile P> : VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<P> {
971+
let InsVOP3OpSel = (ins FP32InputMods:$src0_modifiers, Src0RC64:$src0,
972+
Int32InputMods:$src1_modifiers, Src1RC64:$src1,
973+
FP32InputMods:$src2_modifiers, Src2RC64:$src2,
974+
VGPR_32:$vdst_in, op_sel0:$op_sel);
975+
}
976+
977+
970978
class VOP3_CVT_SCALE_FP4_F16BF16_TiedInput_Profile<VOPProfile P> : VOP3_Profile<P, VOP3_OPSEL> {
971979
let InsVOP3OpSel = (ins FP32InputMods:$src0_modifiers, Src0RC64:$src0,
972980
FP32InputMods:$src1_modifiers, Src1RC64:$src1,
@@ -1046,6 +1054,9 @@ class VOP3_CVT_SCALEF32_PK_F864_Profile<VOPProfile P> : VOP3_Profile<P> {
10461054

10471055
let SubtargetPredicate = HasFP8ConversionScaleInsts, mayRaiseFPException = 0 in {
10481056
let Constraints = "$vdst = $vdst_in", DisableEncoding="$vdst_in" in {
1057+
defm V_CVT_SCALEF32_SR_FP8_BF16 : VOP3Inst<"v_cvt_scalef32_sr_fp8_bf16", VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOP_I32_BF16_I32_F32>>;
1058+
defm V_CVT_SCALEF32_SR_FP8_F16 : VOP3Inst<"v_cvt_scalef32_sr_fp8_f16", VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOP_I32_F16_I32_F32>>;
1059+
defm V_CVT_SCALEF32_SR_FP8_F32 : VOP3Inst<"v_cvt_scalef32_sr_fp8_f32", VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOP_I32_F32_I32_F32>>;
10491060
defm V_CVT_SCALEF32_F16_FP8 : VOP3Inst<"v_cvt_scalef32_f16_fp8", VOP3_CVT_SCALE_F1632_FP8BF8_TiedInput_Profile<VOP_V2F16_I32_F32>>;
10501061
defm V_CVT_SCALEF32_PK_FP8_F32 : VOP3Inst<"v_cvt_scalef32_pk_fp8_f32", VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<VOP_V2I16_F32_F32_F32>>;
10511062
defm V_CVT_SCALEF32_PK_FP8_F16 : VOP3Inst<"v_cvt_scalef32_pk_fp8_f16", VOP3_CVT_SCALE_PK_FP8BF8_F16BF16_TiedInput_Profile<VOP_V2I16_V2F16_F32>>;
@@ -1059,6 +1070,9 @@ let SubtargetPredicate = HasFP8ConversionScaleInsts, mayRaiseFPException = 0 in
10591070

10601071
let SubtargetPredicate = HasBF8ConversionScaleInsts, mayRaiseFPException = 0 in {
10611072
let Constraints = "$vdst = $vdst_in", DisableEncoding="$vdst_in" in {
1073+
defm V_CVT_SCALEF32_SR_BF8_BF16 : VOP3Inst<"v_cvt_scalef32_sr_bf8_bf16", VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOP_I32_BF16_I32_F32>>;
1074+
defm V_CVT_SCALEF32_SR_BF8_F16 : VOP3Inst<"v_cvt_scalef32_sr_bf8_f16", VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOP_I32_F16_I32_F32>>;
1075+
defm V_CVT_SCALEF32_SR_BF8_F32 : VOP3Inst<"v_cvt_scalef32_sr_bf8_f32", VOP3_CVT_SCALE_SR_F8BF8_F16BF16F32_TiedInput_Profile<VOP_I32_F32_I32_F32>>;
10621076
defm V_CVT_SCALEF32_F16_BF8 : VOP3Inst<"v_cvt_scalef32_f16_bf8", VOP3_CVT_SCALE_F1632_FP8BF8_TiedInput_Profile<VOP_V2F16_I32_F32>>;
10631077
defm V_CVT_SCALEF32_PK_BF8_F32 : VOP3Inst<"v_cvt_scalef32_pk_bf8_f32", VOP3_CVT_SCALE_FP4FP8BF8_F32_TiedInput_Profile<VOP_V2I16_F32_F32_F32>>;
10641078
defm V_CVT_SCALEF32_PK_BF8_F16 : VOP3Inst<"v_cvt_scalef32_pk_bf8_f16", VOP3_CVT_SCALE_PK_FP8BF8_F16BF16_TiedInput_Profile<VOP_V2I16_V2F16_F32>>;
@@ -2131,6 +2145,9 @@ defm V_MAXIMUM3_F32 : VOP3_Real_vi <0x2a9>;
21312145
defm V_BITOP3_B16 : VOP3_Real_BITOP3_gfx9<0x233, "v_bitop3_b16">;
21322146
defm V_BITOP3_B32 : VOP3_Real_BITOP3_gfx9<0x234, "v_bitop3_b32">;
21332147
let OtherPredicates = [HasFP8ConversionScaleInsts] in {
2148+
defm V_CVT_SCALEF32_SR_FP8_BF16 : VOP3OpSel_Real_gfx9<0x246>;
2149+
defm V_CVT_SCALEF32_SR_FP8_F16 : VOP3OpSel_Real_gfx9<0x242>;
2150+
defm V_CVT_SCALEF32_SR_FP8_F32 : VOP3OpSel_Real_gfx9<0x237>;
21342151
defm V_CVT_SCALEF32_F16_FP8 : VOP3OpSel_Real_gfx9 <0x24a>;
21352152
defm V_CVT_SCALEF32_F32_FP8 : VOP3OpSel_Real_gfx9 <0x23b>;
21362153
defm V_CVT_SCALEF32_PK_FP8_F32 : VOP3OpSel_Real_gfx9 <0x235>;
@@ -2141,6 +2158,9 @@ defm V_CVT_SCALEF32_PK_F16_FP8 : VOP3OpSel_Real_gfx9<0x248>;
21412158
defm V_CVT_SCALEF32_PK_BF16_FP8 : VOP3OpSel_Real_gfx9<0x269>;
21422159
}
21432160
let OtherPredicates = [HasBF8ConversionScaleInsts] in {
2161+
defm V_CVT_SCALEF32_SR_BF8_BF16 : VOP3OpSel_Real_gfx9<0x247>;
2162+
defm V_CVT_SCALEF32_SR_BF8_F16 : VOP3OpSel_Real_gfx9<0x243>;
2163+
defm V_CVT_SCALEF32_SR_BF8_F32 : VOP3OpSel_Real_gfx9<0x238>;
21442164
defm V_CVT_SCALEF32_F16_BF8 : VOP3OpSel_Real_gfx9 <0x24b>;
21452165
defm V_CVT_SCALEF32_F32_BF8 : VOP3OpSel_Real_gfx9 <0x23c>;
21462166
defm V_CVT_SCALEF32_PK_BF8_F32 : VOP3OpSel_Real_gfx9 <0x236>;

‎llvm/test/MC/AMDGPU/gfx950_asm_features.s

Lines changed: 120 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1407,3 +1407,123 @@ v_cvt_sr_bf16_f32 v0, -v1, v2
14071407
// NOT-GFX950: :[[@LINE+2]]:{{[0-9]+}}: error:
14081408
// GFX950: v_cvt_sr_bf16_f32 v0, |v1|, v2 ; encoding: [0x00,0x01,0xa7,0xd2,0x01,0x05,0x02,0x00]
14091409
v_cvt_sr_bf16_f32 v0, |v1|, v2
1410+
1411+
// NOT-GFX950: error: instruction not supported on this GPU
1412+
// GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x04]
1413+
v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, v3
1414+
1415+
// NOT-GFX950: error: instruction not supported on this GPU
1416+
// GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x24]
1417+
v_cvt_scalef32_sr_bf8_bf16 v0, -v1, v2, v3
1418+
1419+
// NOT-GFX950: error: instruction not supported on this GPU
1420+
// GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x84]
1421+
v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, -v3
1422+
1423+
// NOT-GFX950: error: instruction not supported on this GPU
1424+
// GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x47,0xd2,0x01,0x05,0x0e,0x04]
1425+
v_cvt_scalef32_sr_bf8_bf16 v0, |v1|, v2, v3
1426+
1427+
// NOT-GFX950: error: instruction not supported on this GPU
1428+
// GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x47,0xd2,0x01,0x05,0x0e,0x04]
1429+
v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, |v3|
1430+
1431+
// NOT-GFX950: error: instruction not supported on this GPU
1432+
// GFX950: v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x04]
1433+
v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, v3
1434+
1435+
// NOT-GFX950: error: instruction not supported on this GPU
1436+
// GFX950: v_cvt_scalef32_sr_bf8_f16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x24]
1437+
v_cvt_scalef32_sr_bf8_f16 v0, -v1, v2, v3
1438+
1439+
// NOT-GFX950: error: instruction not supported on this GPU
1440+
// GFX950: v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x84]
1441+
v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, -v3
1442+
1443+
// NOT-GFX950: error: instruction not supported on this GPU
1444+
// GFX950: v_cvt_scalef32_sr_bf8_f16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x43,0xd2,0x01,0x05,0x0e,0x04]
1445+
v_cvt_scalef32_sr_bf8_f16 v0, |v1|, v2, v3
1446+
1447+
// NOT-GFX950: error: instruction not supported on this GPU
1448+
// GFX950: v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x43,0xd2,0x01,0x05,0x0e,0x04]
1449+
v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, |v3|
1450+
1451+
// NOT-GFX950: error: instruction not supported on this GPU
1452+
// GFX950: v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x04]
1453+
v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, v3
1454+
1455+
// NOT-GFX950: error: instruction not supported on this GPU
1456+
// GFX950: v_cvt_scalef32_sr_bf8_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x24]
1457+
v_cvt_scalef32_sr_bf8_f32 v0, -v1, v2, v3
1458+
1459+
// NOT-GFX950: error: instruction not supported on this GPU
1460+
// GFX950: v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x84]
1461+
v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, -v3
1462+
1463+
// NOT-GFX950: error: instruction not supported on this GPU
1464+
// GFX950: v_cvt_scalef32_sr_bf8_f32 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x38,0xd2,0x01,0x05,0x0e,0x04]
1465+
v_cvt_scalef32_sr_bf8_f32 v0, |v1|, v2, v3
1466+
1467+
// NOT-GFX950: error: instruction not supported on this GPU
1468+
// GFX950: v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x38,0xd2,0x01,0x05,0x0e,0x04]
1469+
v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, |v3|
1470+
1471+
// NOT-GFX950: error: instruction not supported on this GPU
1472+
// GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x04]
1473+
v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, v3
1474+
1475+
// NOT-GFX950: error: instruction not supported on this GPU
1476+
// GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x24]
1477+
v_cvt_scalef32_sr_fp8_bf16 v0, -v1, v2, v3
1478+
1479+
// NOT-GFX950: error: instruction not supported on this GPU
1480+
// GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x84]
1481+
v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, -v3
1482+
1483+
// NOT-GFX950: error: instruction not supported on this GPU
1484+
// GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x46,0xd2,0x01,0x05,0x0e,0x04]
1485+
v_cvt_scalef32_sr_fp8_bf16 v0, |v1|, v2, v3
1486+
1487+
// NOT-GFX950: error: instruction not supported on this GPU
1488+
// GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x46,0xd2,0x01,0x05,0x0e,0x04]
1489+
v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, |v3|
1490+
1491+
// NOT-GFX950: error: instruction not supported on this GPU
1492+
// GFX950: v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x04]
1493+
v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, v3
1494+
1495+
// NOT-GFX950: error: instruction not supported on this GPU
1496+
// GFX950: v_cvt_scalef32_sr_fp8_f16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x24]
1497+
v_cvt_scalef32_sr_fp8_f16 v0, -v1, v2, v3
1498+
1499+
// NOT-GFX950: error: instruction not supported on this GPU
1500+
// GFX950: v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x84]
1501+
v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, -v3
1502+
1503+
// NOT-GFX950: error: instruction not supported on this GPU
1504+
// GFX950: v_cvt_scalef32_sr_fp8_f16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x42,0xd2,0x01,0x05,0x0e,0x04]
1505+
v_cvt_scalef32_sr_fp8_f16 v0, |v1|, v2, v3
1506+
1507+
// NOT-GFX950: error: instruction not supported on this GPU
1508+
// GFX950: v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x42,0xd2,0x01,0x05,0x0e,0x04]
1509+
v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, |v3|
1510+
1511+
// NOT-GFX950: error: instruction not supported on this GPU
1512+
// GFX950: v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x04]
1513+
v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, v3
1514+
1515+
// NOT-GFX950: error: instruction not supported on this GPU
1516+
// GFX950: v_cvt_scalef32_sr_fp8_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x24]
1517+
v_cvt_scalef32_sr_fp8_f32 v0, -v1, v2, v3
1518+
1519+
// NOT-GFX950: error: instruction not supported on this GPU
1520+
// GFX950: v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x84]
1521+
v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, -v3
1522+
1523+
// NOT-GFX950: error: instruction not supported on this GPU
1524+
// GFX950: v_cvt_scalef32_sr_fp8_f32 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x37,0xd2,0x01,0x05,0x0e,0x04]
1525+
v_cvt_scalef32_sr_fp8_f32 v0, |v1|, v2, v3
1526+
1527+
// NOT-GFX950: error: instruction not supported on this GPU
1528+
// GFX950: v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x37,0xd2,0x01,0x05,0x0e,0x04]
1529+
v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, |v3|

‎llvm/test/MC/AMDGPU/gfx950_err.s

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -398,3 +398,21 @@ v_cvt_sr_f16_f32 v1, v2, v3 clamp
398398

399399
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
400400
v_cvt_sr_bf16_f32 v1, v2, v3 clamp
401+
402+
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
403+
v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, v3 clamp
404+
405+
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
406+
v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, v3 clamp
407+
408+
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
409+
v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, v3 clamp
410+
411+
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
412+
v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, v3 clamp
413+
414+
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
415+
v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, v3 clamp
416+
417+
// GFX950: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
418+
v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, v3 clamp

‎llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt

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# GFX950: v_cvt_sr_bf16_f32 v0, |v1|, v2 ; encoding: [0x00,0x01,0xa7,0xd2,0x01,0x05,0x02,0x00]
10401040
0x00,0x01,0xa7,0xd2,0x01,0x05,0x02,0x00
1041+
1042+
# GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x04]
1043+
0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x04
1044+
1045+
# GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x24]
1046+
0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x24
1047+
1048+
# GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x84]
1049+
0x00,0x00,0x47,0xd2,0x01,0x05,0x0e,0x84
1050+
1051+
# GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x47,0xd2,0x01,0x05,0x0e,0x04]
1052+
0x00,0x01,0x47,0xd2,0x01,0x05,0x0e,0x04
1053+
1054+
# GFX950: v_cvt_scalef32_sr_bf8_bf16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x47,0xd2,0x01,0x05,0x0e,0x04]
1055+
0x00,0x04,0x47,0xd2,0x01,0x05,0x0e,0x04
1056+
1057+
# GFX950: v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x04]
1058+
0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x04
1059+
1060+
# GFX950: v_cvt_scalef32_sr_bf8_f16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x24]
1061+
0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x24
1062+
1063+
# GFX950: v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x84]
1064+
0x00,0x00,0x43,0xd2,0x01,0x05,0x0e,0x84
1065+
1066+
# GFX950: v_cvt_scalef32_sr_bf8_f16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x43,0xd2,0x01,0x05,0x0e,0x04]
1067+
0x00,0x01,0x43,0xd2,0x01,0x05,0x0e,0x04
1068+
1069+
# GFX950: v_cvt_scalef32_sr_bf8_f16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x43,0xd2,0x01,0x05,0x0e,0x04]
1070+
0x00,0x04,0x43,0xd2,0x01,0x05,0x0e,0x04
1071+
1072+
# GFX950: v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x04]
1073+
0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x04
1074+
1075+
# GFX950: v_cvt_scalef32_sr_bf8_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x24]
1076+
0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x24
1077+
1078+
# GFX950: v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x84]
1079+
0x00,0x00,0x38,0xd2,0x01,0x05,0x0e,0x84
1080+
1081+
# GFX950: v_cvt_scalef32_sr_bf8_f32 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x38,0xd2,0x01,0x05,0x0e,0x04]
1082+
0x00,0x01,0x38,0xd2,0x01,0x05,0x0e,0x04
1083+
1084+
# GFX950: v_cvt_scalef32_sr_bf8_f32 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x38,0xd2,0x01,0x05,0x0e,0x04]
1085+
0x00,0x04,0x38,0xd2,0x01,0x05,0x0e,0x04
1086+
1087+
# GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x04]
1088+
0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x04
1089+
1090+
# GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x24]
1091+
0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x24
1092+
1093+
# GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x84]
1094+
0x00,0x00,0x46,0xd2,0x01,0x05,0x0e,0x84
1095+
1096+
# GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x46,0xd2,0x01,0x05,0x0e,0x04]
1097+
0x00,0x01,0x46,0xd2,0x01,0x05,0x0e,0x04
1098+
1099+
# GFX950: v_cvt_scalef32_sr_fp8_bf16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x46,0xd2,0x01,0x05,0x0e,0x04]
1100+
0x00,0x04,0x46,0xd2,0x01,0x05,0x0e,0x04
1101+
1102+
# GFX950: v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x04]
1103+
0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x04
1104+
1105+
# GFX950: v_cvt_scalef32_sr_fp8_f16 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x24]
1106+
0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x24
1107+
1108+
# GFX950: v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x84]
1109+
0x00,0x00,0x42,0xd2,0x01,0x05,0x0e,0x84
1110+
1111+
# GFX950: v_cvt_scalef32_sr_fp8_f16 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x42,0xd2,0x01,0x05,0x0e,0x04]
1112+
0x00,0x01,0x42,0xd2,0x01,0x05,0x0e,0x04
1113+
1114+
# GFX950: v_cvt_scalef32_sr_fp8_f16 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x42,0xd2,0x01,0x05,0x0e,0x04]
1115+
0x00,0x04,0x42,0xd2,0x01,0x05,0x0e,0x04
1116+
1117+
# GFX950: v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, v3 ; encoding: [0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x04]
1118+
0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x04
1119+
1120+
# GFX950: v_cvt_scalef32_sr_fp8_f32 v0, -v1, v2, v3 ; encoding: [0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x24]
1121+
0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x24
1122+
1123+
# GFX950: v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, -v3 ; encoding: [0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x84]
1124+
0x00,0x00,0x37,0xd2,0x01,0x05,0x0e,0x84
1125+
1126+
# GFX950: v_cvt_scalef32_sr_fp8_f32 v0, |v1|, v2, v3 ; encoding: [0x00,0x01,0x37,0xd2,0x01,0x05,0x0e,0x04]
1127+
0x00,0x01,0x37,0xd2,0x01,0x05,0x0e,0x04
1128+
1129+
# GFX950: v_cvt_scalef32_sr_fp8_f32 v0, v1, v2, |v3| ; encoding: [0x00,0x04,0x37,0xd2,0x01,0x05,0x0e,0x04]
1130+
0x00,0x04,0x37,0xd2,0x01,0x05,0x0e,0x04

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