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[AMDGPU][Docs] DWARF aspace-aware base types (post-review fixes)
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llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst

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@@ -3807,7 +3807,7 @@ A.5.1 Base Type Entries
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2. A ``DW_TAG_base_type`` debugger information entry with the encoding
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``DW_ATE_address`` may have a ``DW_AT_LLVM_address_space`` attribute whose
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value is an architecture specific address space (see
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:ref:`amdgpu-dwarf-address-spaces`). If ommitted it defaults to
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:ref:`amdgpu-dwarf-address-spaces`). If omitted it defaults to
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``DW_ASPACE_LLVM_none``.
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.. _amdgpu-dwarf-type-modifier-entries:

llvm/docs/AMDGPUUsage.rst

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@@ -2938,13 +2938,15 @@ error.
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or from that address space is always an evaluation error.
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For targets which support the generic address space, converting from
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``DW_ASPACE_AMDGPU_generic`` to ``DW_ASPACE_LLVM_none`` is always defined and
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requires no change to the literal value of the address.
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``DW_ASPACE_AMDGPU_generic`` to ``DW_ASPACE_LLVM_none`` is defined when the
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generic address is in the global address space. The conversion requires no
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change to the literal value of the address.
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Converting from ``DW_ASPACE_AMDGPU_generic`` to any of
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``DW_ASPACE_AMDGPU_local``, ``DW_ASPACE_AMDGPU_private_wave`` or
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``DW_ASPACE_AMDGPU_private_lane`` is defined when the relevant hardware
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support is present and setup has been completed. Conversion to
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support is present, any required hardware setup has been completed, and the
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generic address is in the corresponding address space. Conversion to
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``DW_ASPACE_AMDGPU_private_lane`` additionally requires the context to
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include the active lane.
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