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[MISched][NFC] Precommit test for #137988 (#138243)
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=aarch64 -passes=machine-scheduler -o - %s | FileCheck %s
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# RUN: llc -mtriple=aarch64 -passes=machine-scheduler -misched-cutoff=1 -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK-CUTOFF
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# REQUIRES: asserts
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# CHECK-CUTOFF-COUNT-2: Scheduling SU
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# NOTE: copied from machine-scheduler.mir
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--- |
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define i64 @load_imp-def(ptr nocapture %P, i32 %v) {
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entry:
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%0 = bitcast ptr %P to ptr
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%1 = load i32, ptr %0
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%conv = zext i32 %1 to i64
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%arrayidx19 = getelementptr inbounds i64, ptr %P, i64 1
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%arrayidx1 = bitcast ptr %arrayidx19 to ptr
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store i32 %v, ptr %arrayidx1
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%2 = load i64, ptr %arrayidx19
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%and = and i64 %2, 4294967295
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%add = add nuw nsw i64 %and, %conv
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ret i64 %add
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}
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...
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---
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name: load_imp-def
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $w1, $x0
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; CHECK-LABEL: name: load_imp-def
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; CHECK: liveins: $w1, $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $w8 = LDRWui $x0, 1, implicit-def $x8 :: (load (s32) from %ir.0)
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; CHECK-NEXT: $w9 = LDRWui $x0, 0, implicit-def $x9 :: (load (s32) from %ir.arrayidx19, align 8)
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; CHECK-NEXT: STRWui $w1, $x0, 2 :: (store (s32) into %ir.arrayidx1)
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; CHECK-NEXT: $x0 = ADDXrr killed $x9, killed $x8
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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;
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; CHECK-CUTOFF-LABEL: name: load_imp-def
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; CHECK-CUTOFF: liveins: $w1, $x0
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; CHECK-CUTOFF-NEXT: {{ $}}
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; CHECK-CUTOFF-NEXT: $w8 = LDRWui $x0, 1, implicit-def $x8 :: (load (s32) from %ir.0)
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; CHECK-CUTOFF-NEXT: STRWui $w1, $x0, 2 :: (store (s32) into %ir.arrayidx1)
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; CHECK-CUTOFF-NEXT: $w9 = LDRWui $x0, 0, implicit-def $x9 :: (load (s32) from %ir.arrayidx19, align 8)
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; CHECK-CUTOFF-NEXT: $x0 = ADDXrr killed $x9, killed $x8
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; CHECK-CUTOFF-NEXT: RET_ReallyLR implicit $x0
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$w8 = LDRWui $x0, 1, implicit-def $x8 :: (load (s32) from %ir.0)
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STRWui killed $w1, $x0, 2 :: (store (s32) into %ir.arrayidx1)
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$w9 = LDRWui killed $x0, 0, implicit-def $x9 :: (load (s32) from %ir.arrayidx19, align 8)
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$x0 = ADDXrr killed $x9, killed $x8
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RET_ReallyLR implicit $x0
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...
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