Skip to content

Commit 924ad19

Browse files
KanRobertKanRobert
committed
[X86][CodeGen] Add missing patterns for APX NDD instructions about encoding trick
1 parent b8e0f3e commit 924ad19

File tree

2 files changed

+76
-41
lines changed

2 files changed

+76
-41
lines changed

‎llvm/lib/Target/X86/X86InstrCompiler.td

Lines changed: 58 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -1493,27 +1493,71 @@ def : Pat<(xor GR32:$src1, -2147483648),
14931493

14941494
// Odd encoding trick: -128 fits into an 8-bit immediate field while
14951495
// +128 doesn't, so in this special case use a sub instead of an add.
1496-
def : Pat<(add GR16:$src1, 128),
1497-
(SUB16ri GR16:$src1, -128)>;
1496+
let Predicates = [NoNDD] in {
1497+
def : Pat<(add GR16:$src1, 128),
1498+
(SUB16ri GR16:$src1, -128)>;
1499+
def : Pat<(add GR32:$src1, 128),
1500+
(SUB32ri GR32:$src1, -128)>;
1501+
def : Pat<(add GR64:$src1, 128),
1502+
(SUB64ri32 GR64:$src1, -128)>;
1503+
1504+
def : Pat<(X86add_flag_nocf GR16:$src1, 128),
1505+
(SUB16ri GR16:$src1, -128)>;
1506+
def : Pat<(X86add_flag_nocf GR32:$src1, 128),
1507+
(SUB32ri GR32:$src1, -128)>;
1508+
def : Pat<(X86add_flag_nocf GR64:$src1, 128),
1509+
(SUB64ri32 GR64:$src1, -128)>;
1510+
}
1511+
let Predicates = [HasNDD] in {
1512+
def : Pat<(add GR16:$src1, 128),
1513+
(SUB16ri_ND GR16:$src1, -128)>;
1514+
def : Pat<(add GR32:$src1, 128),
1515+
(SUB32ri_ND GR32:$src1, -128)>;
1516+
def : Pat<(add GR64:$src1, 128),
1517+
(SUB64ri32_ND GR64:$src1, -128)>;
1518+
1519+
def : Pat<(X86add_flag_nocf GR16:$src1, 128),
1520+
(SUB16ri_ND GR16:$src1, -128)>;
1521+
def : Pat<(X86add_flag_nocf GR32:$src1, 128),
1522+
(SUB32ri_ND GR32:$src1, -128)>;
1523+
def : Pat<(X86add_flag_nocf GR64:$src1, 128),
1524+
(SUB64ri32_ND GR64:$src1, -128)>;
1525+
}
14981526
def : Pat<(store (add (loadi16 addr:$dst), 128), addr:$dst),
14991527
(SUB16mi addr:$dst, -128)>;
1500-
1501-
def : Pat<(add GR32:$src1, 128),
1502-
(SUB32ri GR32:$src1, -128)>;
15031528
def : Pat<(store (add (loadi32 addr:$dst), 128), addr:$dst),
15041529
(SUB32mi addr:$dst, -128)>;
1505-
1506-
def : Pat<(add GR64:$src1, 128),
1507-
(SUB64ri32 GR64:$src1, -128)>;
15081530
def : Pat<(store (add (loadi64 addr:$dst), 128), addr:$dst),
15091531
(SUB64mi32 addr:$dst, -128)>;
1532+
let Predicates = [HasNDD] in {
1533+
def : Pat<(add (loadi16 addr:$src), 128),
1534+
(SUB16mi_ND addr:$src, -128)>;
1535+
def : Pat<(add (loadi32 addr:$src), 128),
1536+
(SUB32mi_ND addr:$src, -128)>;
1537+
def : Pat<(add (loadi64 addr:$src), 128),
1538+
(SUB64mi32_ND addr:$src, -128)>;
1539+
}
15101540

1511-
def : Pat<(X86add_flag_nocf GR16:$src1, 128),
1512-
(SUB16ri GR16:$src1, -128)>;
1513-
def : Pat<(X86add_flag_nocf GR32:$src1, 128),
1514-
(SUB32ri GR32:$src1, -128)>;
1515-
def : Pat<(X86add_flag_nocf GR64:$src1, 128),
1516-
(SUB64ri32 GR64:$src1, -128)>;
1541+
// The same trick applies for 32-bit immediate fields in 64-bit
1542+
// instructions.
1543+
let Predicates = [NoNDD] in {
1544+
def : Pat<(add GR64:$src1, 0x0000000080000000),
1545+
(SUB64ri32 GR64:$src1, 0xffffffff80000000)>;
1546+
def : Pat<(X86add_flag_nocf GR64:$src1, 0x0000000080000000),
1547+
(SUB64ri32 GR64:$src1, 0xffffffff80000000)>;
1548+
}
1549+
let Predicates = [HasNDD] in {
1550+
def : Pat<(add GR64:$src1, 0x0000000080000000),
1551+
(SUB64ri32_ND GR64:$src1, 0xffffffff80000000)>;
1552+
def : Pat<(X86add_flag_nocf GR64:$src1, 0x0000000080000000),
1553+
(SUB64ri32_ND GR64:$src1, 0xffffffff80000000)>;
1554+
}
1555+
def : Pat<(store (add (loadi64 addr:$dst), 0x0000000080000000), addr:$dst),
1556+
(SUB64mi32 addr:$dst, 0xffffffff80000000)>;
1557+
let Predicates = [HasNDD] in {
1558+
def : Pat<(add(loadi64 addr:$src), 0x0000000080000000),
1559+
(SUB64mi32_ND addr:$src, 0xffffffff80000000)>;
1560+
}
15171561

15181562
// Depositing value to 8/16 bit subreg:
15191563
def : Pat<(or (and GR64:$dst, -256),
@@ -1532,15 +1576,6 @@ def : Pat<(or (and GR32:$dst, -65536),
15321576
(i32 (zextloadi16 addr:$src))),
15331577
(INSERT_SUBREG (i32 (COPY $dst)), (MOV16rm i16mem:$src), sub_16bit)>;
15341578

1535-
// The same trick applies for 32-bit immediate fields in 64-bit
1536-
// instructions.
1537-
def : Pat<(add GR64:$src1, 0x0000000080000000),
1538-
(SUB64ri32 GR64:$src1, 0xffffffff80000000)>;
1539-
def : Pat<(store (add (loadi64 addr:$dst), 0x0000000080000000), addr:$dst),
1540-
(SUB64mi32 addr:$dst, 0xffffffff80000000)>;
1541-
def : Pat<(X86add_flag_nocf GR64:$src1, 0x0000000080000000),
1542-
(SUB64ri32 GR64:$src1, 0xffffffff80000000)>;
1543-
15441579
// To avoid needing to materialize an immediate in a register, use a 32-bit and
15451580
// with implicit zero-extension instead of a 64-bit and if the immediate has at
15461581
// least 32 bits of leading zeros. If in addition the last 32 bits can be

‎llvm/test/CodeGen/X86/apx/sub.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -89,31 +89,31 @@ entry:
8989
define i16 @sub16ri8(i16 noundef %a) {
9090
; CHECK-LABEL: sub16ri8:
9191
; CHECK: # %bb.0: # %entry
92-
; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x85]
92+
; CHECK-NEXT: subl $-128, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xef,0x80]
9393
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
9494
; CHECK-NEXT: retq # encoding: [0xc3]
9595
entry:
96-
%sub = sub i16 %a, 123
96+
%sub = sub i16 %a, -128
9797
ret i16 %sub
9898
}
9999

100100
define i32 @sub32ri8(i32 noundef %a) {
101101
; CHECK-LABEL: sub32ri8:
102102
; CHECK: # %bb.0: # %entry
103-
; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x85]
103+
; CHECK-NEXT: subl $-128, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xef,0x80]
104104
; CHECK-NEXT: retq # encoding: [0xc3]
105105
entry:
106-
%sub = sub i32 %a, 123
106+
%sub = sub i32 %a, -128
107107
ret i32 %sub
108108
}
109109

110110
define i64 @sub64ri8(i64 noundef %a) {
111111
; CHECK-LABEL: sub64ri8:
112112
; CHECK: # %bb.0: # %entry
113-
; CHECK-NEXT: addq $-123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xc7,0x85]
113+
; CHECK-NEXT: subq $-128, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xef,0x80]
114114
; CHECK-NEXT: retq # encoding: [0xc3]
115115
entry:
116-
%sub = sub i64 %a, 123
116+
%sub = sub i64 %a, -128
117117
ret i64 %sub
118118
}
119119

@@ -153,11 +153,11 @@ entry:
153153
define i64 @sub64ri(i64 noundef %a) {
154154
; CHECK-LABEL: sub64ri:
155155
; CHECK: # %bb.0: # %entry
156-
; CHECK-NEXT: addq $-123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0xc0,0x1d,0xfe,0xff]
157-
; CHECK-NEXT: # imm = 0xFFFE1DC0
156+
; CHECK-NEXT: subq $-2147483648, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xef,0x00,0x00,0x00,0x80]
157+
; CHECK-NEXT: # imm = 0x80000000
158158
; CHECK-NEXT: retq # encoding: [0xc3]
159159
entry:
160-
%sub = sub i64 %a, 123456
160+
%sub = sub i64 %a, -2147483648
161161
ret i64 %sub
162162
}
163163

@@ -211,34 +211,34 @@ define i16 @sub16mi8(ptr %a) {
211211
; CHECK-LABEL: sub16mi8:
212212
; CHECK: # %bb.0: # %entry
213213
; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
214-
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
214+
; CHECK-NEXT: subl $-128, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe8,0x80]
215215
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
216216
; CHECK-NEXT: retq # encoding: [0xc3]
217217
entry:
218218
%t= load i16, ptr %a
219-
%sub = sub nsw i16 %t, 123
219+
%sub = sub nsw i16 %t, -128
220220
ret i16 %sub
221221
}
222222

223223
define i32 @sub32mi8(ptr %a) {
224224
; CHECK-LABEL: sub32mi8:
225225
; CHECK: # %bb.0: # %entry
226-
; CHECK-NEXT: addl $-123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x07,0x85]
226+
; CHECK-NEXT: subl $-128, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x2f,0x80]
227227
; CHECK-NEXT: retq # encoding: [0xc3]
228228
entry:
229229
%t= load i32, ptr %a
230-
%sub = sub nsw i32 %t, 123
230+
%sub = sub nsw i32 %t, -128
231231
ret i32 %sub
232232
}
233233

234234
define i64 @sub64mi8(ptr %a) {
235235
; CHECK-LABEL: sub64mi8:
236236
; CHECK: # %bb.0: # %entry
237-
; CHECK-NEXT: addq $-123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x07,0x85]
237+
; CHECK-NEXT: subq $-128, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x2f,0x80]
238238
; CHECK-NEXT: retq # encoding: [0xc3]
239239
entry:
240240
%t= load i64, ptr %a
241-
%sub = sub nsw i64 %t, 123
241+
%sub = sub nsw i64 %t, -128
242242
ret i64 %sub
243243
}
244244

@@ -282,12 +282,12 @@ entry:
282282
define i64 @sub64mi(ptr %a) {
283283
; CHECK-LABEL: sub64mi:
284284
; CHECK: # %bb.0: # %entry
285-
; CHECK-NEXT: addq $-123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0xc0,0x1d,0xfe,0xff]
286-
; CHECK-NEXT: # imm = 0xFFFE1DC0
285+
; CHECK-NEXT: subq $-2147483648, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x2f,0x00,0x00,0x00,0x80]
286+
; CHECK-NEXT: # imm = 0x80000000
287287
; CHECK-NEXT: retq # encoding: [0xc3]
288288
entry:
289289
%t= load i64, ptr %a
290-
%sub = sub nsw i64 %t, 123456
290+
%sub = sub nsw i64 %t, -2147483648
291291
ret i64 %sub
292292
}
293293

0 commit comments

Comments
 (0)