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[ARC][CSKY][Lanai] TableGen-erate SDNode descriptions (#138874)
This consolidates node definitions into one place and enables automatic node verification. Part of #119709.
1 parent cedeef6 commit 92cc31b

20 files changed

+144
-191
lines changed

llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp

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@@ -11,6 +11,7 @@
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//===----------------------------------------------------------------------===//
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#include "ARC.h"
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#include "ARCSelectionDAGInfo.h"
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#include "ARCTargetMachine.h"
1516
#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"

llvm/lib/Target/ARC/ARCISelLowering.cpp

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@@ -13,6 +13,7 @@
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#include "ARCISelLowering.h"
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#include "ARC.h"
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#include "ARCMachineFunctionInfo.h"
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#include "ARCSelectionDAGInfo.h"
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#include "ARCSubtarget.h"
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#include "ARCTargetMachine.h"
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#include "MCTargetDesc/ARCInfo.h"
@@ -178,24 +179,6 @@ ARCTargetLowering::ARCTargetLowering(const TargetMachine &TM,
178179
setMaxAtomicSizeInBitsSupported(0);
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}
180181

181-
const char *ARCTargetLowering::getTargetNodeName(unsigned Opcode) const {
182-
switch (Opcode) {
183-
case ARCISD::BL:
184-
return "ARCISD::BL";
185-
case ARCISD::CMOV:
186-
return "ARCISD::CMOV";
187-
case ARCISD::CMP:
188-
return "ARCISD::CMP";
189-
case ARCISD::BRcc:
190-
return "ARCISD::BRcc";
191-
case ARCISD::RET:
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return "ARCISD::RET";
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case ARCISD::GAWRAPPER:
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return "ARCISD::GAWRAPPER";
195-
}
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return nullptr;
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}
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//===----------------------------------------------------------------------===//
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// Misc Lower Operation implementation
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//===----------------------------------------------------------------------===//

llvm/lib/Target/ARC/ARCISelLowering.h

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@@ -24,36 +24,6 @@ namespace llvm {
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class ARCSubtarget;
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class ARCTargetMachine;
2626

27-
namespace ARCISD {
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29-
enum NodeType : unsigned {
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// Start the numbering where the builtin ops and target ops leave off.
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
32-
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// Branch and link (call)
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BL,
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// Jump and link (indirect call)
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JL,
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// CMP
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CMP,
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// CMOV
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CMOV,
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// BRcc
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BRcc,
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// Global Address Wrapper
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GAWRAPPER,
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// return, (j_s [blink])
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RET
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};
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55-
} // end namespace ARCISD
56-
5727
//===--------------------------------------------------------------------===//
5828
// TargetLowering Implementation
5929
//===--------------------------------------------------------------------===//
@@ -65,9 +35,6 @@ class ARCTargetLowering : public TargetLowering {
6535
/// Provide custom lowering hooks for some operations.
6636
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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68-
/// This method returns the name of a target specific DAG node.
69-
const char *getTargetNodeName(unsigned Opcode) const override;
70-
7138
/// Return true if the addressing mode represented by AM is legal for this
7239
/// target, for a load/store of the specified type.
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bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
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@@ -0,0 +1,19 @@
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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
7+
//===----------------------------------------------------------------------===//
8+
9+
#include "ARCSelectionDAGInfo.h"
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11+
#define GET_SDNODE_DESC
12+
#include "ARCGenSDNodeInfo.inc"
13+
14+
using namespace llvm;
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16+
ARCSelectionDAGInfo::ARCSelectionDAGInfo()
17+
: SelectionDAGGenTargetInfo(ARCGenSDNodeInfo) {}
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19+
ARCSelectionDAGInfo::~ARCSelectionDAGInfo() = default;
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@@ -0,0 +1,28 @@
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//===----------------------------------------------------------------------===//
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//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#ifndef LLVM_LIB_TARGET_ARC_ARCSELECTIONDAGINFO_H
10+
#define LLVM_LIB_TARGET_ARC_ARCSELECTIONDAGINFO_H
11+
12+
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
13+
14+
#define GET_SDNODE_ENUM
15+
#include "ARCGenSDNodeInfo.inc"
16+
17+
namespace llvm {
18+
19+
class ARCSelectionDAGInfo : public SelectionDAGGenTargetInfo {
20+
public:
21+
ARCSelectionDAGInfo();
22+
23+
~ARCSelectionDAGInfo() override;
24+
};
25+
26+
} // namespace llvm
27+
28+
#endif // LLVM_LIB_TARGET_ARC_ARCSELECTIONDAGINFO_H

llvm/lib/Target/ARC/ARCSubtarget.cpp

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@@ -12,6 +12,7 @@
1212

1313
#include "ARCSubtarget.h"
1414
#include "ARC.h"
15+
#include "ARCSelectionDAGInfo.h"
1516
#include "llvm/MC/TargetRegistry.h"
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1718
using namespace llvm;
@@ -27,4 +28,12 @@ void ARCSubtarget::anchor() {}
2728
ARCSubtarget::ARCSubtarget(const Triple &TT, const std::string &CPU,
2829
const std::string &FS, const TargetMachine &TM)
2930
: ARCGenSubtargetInfo(TT, CPU, /*TuneCPU=*/CPU, FS), InstrInfo(*this),
30-
FrameLowering(*this), TLInfo(TM, *this) {}
31+
FrameLowering(*this), TLInfo(TM, *this) {
32+
TSInfo = std::make_unique<ARCSelectionDAGInfo>();
33+
}
34+
35+
ARCSubtarget::~ARCSubtarget() = default;
36+
37+
const SelectionDAGTargetInfo *ARCSubtarget::getSelectionDAGInfo() const {
38+
return TSInfo.get();
39+
}

llvm/lib/Target/ARC/ARCSubtarget.h

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@@ -16,7 +16,6 @@
1616
#include "ARCFrameLowering.h"
1717
#include "ARCISelLowering.h"
1818
#include "ARCInstrInfo.h"
19-
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
2019
#include "llvm/CodeGen/TargetSubtargetInfo.h"
2120
#include <string>
2221

@@ -33,7 +32,7 @@ class ARCSubtarget : public ARCGenSubtargetInfo {
3332
ARCInstrInfo InstrInfo;
3433
ARCFrameLowering FrameLowering;
3534
ARCTargetLowering TLInfo;
36-
SelectionDAGTargetInfo TSInfo;
35+
std::unique_ptr<const SelectionDAGTargetInfo> TSInfo;
3736

3837
// ARC processor extensions
3938
bool Xnorm = false;
@@ -44,6 +43,8 @@ class ARCSubtarget : public ARCGenSubtargetInfo {
4443
ARCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
4544
const TargetMachine &TM);
4645

46+
~ARCSubtarget() override;
47+
4748
/// Parses features string setting specified subtarget options.
4849
/// Definition of function is auto generated by tblgen.
4950
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
@@ -58,9 +59,8 @@ class ARCSubtarget : public ARCGenSubtargetInfo {
5859
const ARCRegisterInfo *getRegisterInfo() const override {
5960
return &InstrInfo.getRegisterInfo();
6061
}
61-
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
62-
return &TSInfo;
63-
}
62+
63+
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override;
6464

6565
bool hasNorm() const { return Xnorm; }
6666
};

llvm/lib/Target/ARC/CMakeLists.txt

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@@ -8,6 +8,7 @@ tablegen(LLVM ARCGenDAGISel.inc -gen-dag-isel)
88
tablegen(LLVM ARCGenDisassemblerTables.inc -gen-disassembler)
99
tablegen(LLVM ARCGenInstrInfo.inc -gen-instr-info)
1010
tablegen(LLVM ARCGenRegisterInfo.inc -gen-register-info)
11+
tablegen(LLVM ARCGenSDNodeInfo.inc -gen-sd-node-info)
1112
tablegen(LLVM ARCGenSubtargetInfo.inc -gen-subtarget)
1213

1314
add_public_tablegen_target(ARCCommonTableGen)
@@ -24,6 +25,7 @@ add_llvm_target(ARCCodeGen
2425
ARCMCInstLower.cpp
2526
ARCOptAddrMode.cpp
2627
ARCRegisterInfo.cpp
28+
ARCSelectionDAGInfo.cpp
2729
ARCSubtarget.cpp
2830
ARCTargetMachine.cpp
2931

llvm/lib/Target/CSKY/CMakeLists.txt

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@@ -12,6 +12,7 @@ tablegen(LLVM CSKYGenInstrInfo.inc -gen-instr-info)
1212
tablegen(LLVM CSKYGenMCCodeEmitter.inc -gen-emitter)
1313
tablegen(LLVM CSKYGenMCPseudoLowering.inc -gen-pseudo-lowering)
1414
tablegen(LLVM CSKYGenRegisterInfo.inc -gen-register-info)
15+
tablegen(LLVM CSKYGenSDNodeInfo.inc -gen-sd-node-info)
1516
tablegen(LLVM CSKYGenSubtargetInfo.inc -gen-subtarget)
1617

1718
add_public_tablegen_target(CSKYCommonTableGen)
@@ -26,6 +27,7 @@ add_llvm_target(CSKYCodeGen
2627
CSKYISelLowering.cpp
2728
CSKYMCInstLower.cpp
2829
CSKYRegisterInfo.cpp
30+
CSKYSelectionDAGInfo.cpp
2931
CSKYSubtarget.cpp
3032
CSKYTargetMachine.cpp
3133
CSKYTargetObjectFile.cpp

llvm/lib/Target/CSKY/CSKYISelLowering.cpp

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@@ -1117,33 +1117,6 @@ SDValue CSKYTargetLowering::getTargetNode(ConstantPoolSDNode *N, SDLoc DL,
11171117
N->getOffset(), Flags);
11181118
}
11191119

1120-
const char *CSKYTargetLowering::getTargetNodeName(unsigned Opcode) const {
1121-
switch (Opcode) {
1122-
default:
1123-
llvm_unreachable("unknown CSKYISD node");
1124-
case CSKYISD::NIE:
1125-
return "CSKYISD::NIE";
1126-
case CSKYISD::NIR:
1127-
return "CSKYISD::NIR";
1128-
case CSKYISD::RET:
1129-
return "CSKYISD::RET";
1130-
case CSKYISD::CALL:
1131-
return "CSKYISD::CALL";
1132-
case CSKYISD::CALLReg:
1133-
return "CSKYISD::CALLReg";
1134-
case CSKYISD::TAIL:
1135-
return "CSKYISD::TAIL";
1136-
case CSKYISD::TAILReg:
1137-
return "CSKYISD::TAILReg";
1138-
case CSKYISD::LOAD_ADDR:
1139-
return "CSKYISD::LOAD_ADDR";
1140-
case CSKYISD::BITCAST_TO_LOHI:
1141-
return "CSKYISD::BITCAST_TO_LOHI";
1142-
case CSKYISD::BITCAST_FROM_LOHI:
1143-
return "CSKYISD::BITCAST_FROM_LOHI";
1144-
}
1145-
}
1146-
11471120
SDValue CSKYTargetLowering::LowerGlobalAddress(SDValue Op,
11481121
SelectionDAG &DAG) const {
11491122
SDLoc DL(Op);

llvm/lib/Target/CSKY/CSKYISelLowering.h

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@@ -14,31 +14,14 @@
1414
#ifndef LLVM_LIB_TARGET_CSKY_CSKYISELLOWERING_H
1515
#define LLVM_LIB_TARGET_CSKY_CSKYISELLOWERING_H
1616

17+
#include "CSKYSelectionDAGInfo.h"
1718
#include "MCTargetDesc/CSKYBaseInfo.h"
1819
#include "llvm/CodeGen/CallingConvLower.h"
1920
#include "llvm/CodeGen/TargetLowering.h"
2021

2122
namespace llvm {
2223
class CSKYSubtarget;
2324

24-
namespace CSKYISD {
25-
enum NodeType : unsigned {
26-
FIRST_NUMBER = ISD::BUILTIN_OP_END,
27-
NIE,
28-
NIR,
29-
RET,
30-
CALL,
31-
CALLReg,
32-
TAIL,
33-
TAILReg,
34-
LOAD_ADDR,
35-
// i32, i32 <-- f64
36-
BITCAST_TO_LOHI,
37-
// f64 < -- i32, i32
38-
BITCAST_FROM_LOHI,
39-
};
40-
}
41-
4225
class CSKYTargetLowering : public TargetLowering {
4326
const CSKYSubtarget &Subtarget;
4427

@@ -71,8 +54,6 @@ class CSKYTargetLowering : public TargetLowering {
7154
SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
7255
SmallVectorImpl<SDValue> &InVals) const override;
7356

74-
const char *getTargetNodeName(unsigned Opcode) const override;
75-
7657
/// If a physical register, this returns the register that receives the
7758
/// exception address on entry to an EH pad.
7859
Register
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1+
//===----------------------------------------------------------------------===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#include "CSKYSelectionDAGInfo.h"
10+
11+
#define GET_SDNODE_DESC
12+
#include "CSKYGenSDNodeInfo.inc"
13+
14+
using namespace llvm;
15+
16+
CSKYSelectionDAGInfo::CSKYSelectionDAGInfo()
17+
: SelectionDAGGenTargetInfo(CSKYGenSDNodeInfo) {}
18+
19+
CSKYSelectionDAGInfo::~CSKYSelectionDAGInfo() = default;
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@@ -0,0 +1,28 @@
1+
//===----------------------------------------------------------------------===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#ifndef LLVM_LIB_TARGET_CSKY_CSKYSELECTIONDAGINFO_H
10+
#define LLVM_LIB_TARGET_CSKY_CSKYSELECTIONDAGINFO_H
11+
12+
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
13+
14+
#define GET_SDNODE_ENUM
15+
#include "CSKYGenSDNodeInfo.inc"
16+
17+
namespace llvm {
18+
19+
class CSKYSelectionDAGInfo : public SelectionDAGGenTargetInfo {
20+
public:
21+
CSKYSelectionDAGInfo();
22+
23+
~CSKYSelectionDAGInfo() override;
24+
};
25+
26+
} // namespace llvm
27+
28+
#endif // LLVM_LIB_TARGET_CSKY_CSKYSELECTIONDAGINFO_H

llvm/lib/Target/CSKY/CSKYSubtarget.cpp

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@@ -11,6 +11,7 @@
1111
//===----------------------------------------------------------------------===//
1212

1313
#include "CSKYSubtarget.h"
14+
#include "CSKYSelectionDAGInfo.h"
1415
#include "llvm/CodeGen/MachineFrameInfo.h"
1516

1617
using namespace llvm;
@@ -91,7 +92,15 @@ CSKYSubtarget::CSKYSubtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU,
9192
StringRef FS, const TargetMachine &TM)
9293
: CSKYGenSubtargetInfo(TT, CPU, TuneCPU, FS),
9394
FrameLowering(initializeSubtargetDependencies(TT, CPU, TuneCPU, FS)),
94-
InstrInfo(*this), RegInfo(), TLInfo(TM, *this) {}
95+
InstrInfo(*this), RegInfo(), TLInfo(TM, *this) {
96+
TSInfo = std::make_unique<CSKYSelectionDAGInfo>();
97+
}
98+
99+
CSKYSubtarget::~CSKYSubtarget() = default;
100+
101+
const SelectionDAGTargetInfo *CSKYSubtarget::getSelectionDAGInfo() const {
102+
return TSInfo.get();
103+
}
95104

96105
bool CSKYSubtarget::useHardFloatABI() const {
97106
auto FloatABI = getTargetLowering()->getTargetMachine().Options.FloatABIType;

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