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[RISCV] Move PseudoRVVInitUndef pseudos to RISCVInstrInfoVPseudos.td. NFC
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llvm/lib/Target/RISCV/RISCVInstrInfo.td

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@@ -1885,14 +1885,6 @@ def : Pat<(binop_allwusers<add> GPR:$rs1, (AddiPair:$rs2)),
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(AddiPairImmSmall AddiPair:$rs2))>;
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}
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/// Empty pseudo for RISCVInitUndefPass
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0, Size = 0, isCodeGenOnly = 1 in {
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def PseudoRVVInitUndefM1 : Pseudo<(outs VR:$vd), (ins), [], "">;
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def PseudoRVVInitUndefM2 : Pseudo<(outs VRM2:$vd), (ins), [], "">;
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def PseudoRVVInitUndefM4 : Pseudo<(outs VRM4:$vd), (ins), [], "">;
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def PseudoRVVInitUndefM8 : Pseudo<(outs VRM8:$vd), (ins), [], "">;
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}
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//===----------------------------------------------------------------------===//
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// Standard extensions
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//===----------------------------------------------------------------------===//

llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

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@@ -5445,6 +5445,15 @@ foreach lmul = MxList in {
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}
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}
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/// Empty pseudo for RISCVInitUndefPass
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0, Size = 0,
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isCodeGenOnly = 1 in {
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def PseudoRVVInitUndefM1 : Pseudo<(outs VR:$vd), (ins), [], "">;
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def PseudoRVVInitUndefM2 : Pseudo<(outs VRM2:$vd), (ins), [], "">;
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def PseudoRVVInitUndefM4 : Pseudo<(outs VRM4:$vd), (ins), [], "">;
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def PseudoRVVInitUndefM8 : Pseudo<(outs VRM8:$vd), (ins), [], "">;
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}
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//===----------------------------------------------------------------------===//
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// 6. Configuration-Setting Instructions
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//===----------------------------------------------------------------------===//

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