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SamTebbs33SamTebbs33
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[AArch64][SME] Warn when using a streaming builtin from a non-streaming function (#75487)
This PR adds a warning that's emitted when a non-streaming or non-streaming-compatible builtin is called in an unsuitable function. Uses work by Kerry McLaughlin. This is a re-upload of #74064 and fixes a compile time increase.
1 parent c7cdf3c commit 945c645

19 files changed

+1054
-829
lines changed

‎clang/include/clang/Basic/CMakeLists.txt

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,9 @@ clang_tablegen(arm_sve_typeflags.inc -gen-arm-sve-typeflags
8888
clang_tablegen(arm_sve_sema_rangechecks.inc -gen-arm-sve-sema-rangechecks
8989
SOURCE arm_sve.td
9090
TARGET ClangARMSveSemaRangeChecks)
91+
clang_tablegen(arm_sve_streaming_attrs.inc -gen-arm-sve-streaming-attrs
92+
SOURCE arm_sve.td
93+
TARGET ClangARMSveStreamingAttrs)
9194
clang_tablegen(arm_sme_builtins.inc -gen-arm-sme-builtins
9295
SOURCE arm_sme.td
9396
TARGET ClangARMSmeBuiltins)
@@ -97,6 +100,9 @@ clang_tablegen(arm_sme_builtin_cg.inc -gen-arm-sme-builtin-codegen
97100
clang_tablegen(arm_sme_sema_rangechecks.inc -gen-arm-sme-sema-rangechecks
98101
SOURCE arm_sme.td
99102
TARGET ClangARMSmeSemaRangeChecks)
103+
clang_tablegen(arm_sme_streaming_attrs.inc -gen-arm-sme-streaming-attrs
104+
SOURCE arm_sme.td
105+
TARGET ClangARMSmeStreamingAttrs)
100106
clang_tablegen(arm_cde_builtins.inc -gen-arm-cde-builtin-def
101107
SOURCE arm_cde.td
102108
TARGET ClangARMCdeBuiltinsDef)

‎clang/include/clang/Basic/arm_sve.td

Lines changed: 582 additions & 582 deletions
Large diffs are not rendered by default.

‎clang/include/clang/Sema/Sema.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13851,6 +13851,7 @@ class Sema final {
1385113851
bool CheckSVEBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall);
1385213852
bool ParseSVEImmChecks(CallExpr *TheCall,
1385313853
SmallVector<std::tuple<int, int, int>, 3> &ImmChecks);
13854+
bool CheckSMEBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall);
1385413855
bool CheckCDEBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
1385513856
CallExpr *TheCall);
1385613857
bool CheckARMCoprocessorImmediate(const TargetInfo &TI, const Expr *CoprocArg,

‎clang/lib/Sema/SemaChecking.cpp

Lines changed: 47 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3156,7 +3156,6 @@ static void checkArmStreamingBuiltin(Sema &S, CallExpr *TheCall,
31563156
const FunctionDecl *FD,
31573157
ArmStreamingType BuiltinType) {
31583158
ArmStreamingType FnType = getArmStreamingFnType(FD);
3159-
31603159
if (FnType == ArmStreaming && BuiltinType == ArmNonStreaming) {
31613160
S.Diag(TheCall->getBeginLoc(), diag::warn_attribute_arm_sm_incompat_builtin)
31623161
<< TheCall->getSourceRange() << "streaming";
@@ -3168,9 +3167,53 @@ static void checkArmStreamingBuiltin(Sema &S, CallExpr *TheCall,
31683167
<< TheCall->getSourceRange() << "streaming compatible";
31693168
return;
31703169
}
3170+
3171+
if (FnType == ArmNonStreaming && BuiltinType == ArmStreaming) {
3172+
S.Diag(TheCall->getBeginLoc(), diag::warn_attribute_arm_sm_incompat_builtin)
3173+
<< TheCall->getSourceRange() << "non-streaming";
3174+
}
3175+
}
3176+
3177+
bool Sema::CheckSMEBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3178+
if (const FunctionDecl *FD = getCurFunctionDecl()) {
3179+
std::optional<ArmStreamingType> BuiltinType;
3180+
3181+
switch (BuiltinID) {
3182+
#define GET_SME_STREAMING_ATTRS
3183+
#include "clang/Basic/arm_sme_streaming_attrs.inc"
3184+
#undef GET_SME_STREAMING_ATTRS
3185+
}
3186+
3187+
if (BuiltinType)
3188+
checkArmStreamingBuiltin(*this, TheCall, FD, *BuiltinType);
3189+
}
3190+
3191+
// Range check SME intrinsics that take immediate values.
3192+
SmallVector<std::tuple<int, int, int>, 3> ImmChecks;
3193+
3194+
switch (BuiltinID) {
3195+
default:
3196+
return false;
3197+
#define GET_SME_IMMEDIATE_CHECK
3198+
#include "clang/Basic/arm_sme_sema_rangechecks.inc"
3199+
#undef GET_SME_IMMEDIATE_CHECK
3200+
}
3201+
3202+
return ParseSVEImmChecks(TheCall, ImmChecks);
31713203
}
31723204

31733205
bool Sema::CheckSVEBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3206+
if (const FunctionDecl *FD = getCurFunctionDecl()) {
3207+
std::optional<ArmStreamingType> BuiltinType;
3208+
3209+
switch (BuiltinID) {
3210+
#define GET_SVE_STREAMING_ATTRS
3211+
#include "clang/Basic/arm_sve_streaming_attrs.inc"
3212+
#undef GET_SVE_STREAMING_ATTRS
3213+
}
3214+
if (BuiltinType)
3215+
checkArmStreamingBuiltin(*this, TheCall, FD, *BuiltinType);
3216+
}
31743217
// Range check SVE intrinsics that take immediate values.
31753218
SmallVector<std::tuple<int, int, int>, 3> ImmChecks;
31763219

@@ -3180,9 +3223,6 @@ bool Sema::CheckSVEBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
31803223
#define GET_SVE_IMMEDIATE_CHECK
31813224
#include "clang/Basic/arm_sve_sema_rangechecks.inc"
31823225
#undef GET_SVE_IMMEDIATE_CHECK
3183-
#define GET_SME_IMMEDIATE_CHECK
3184-
#include "clang/Basic/arm_sme_sema_rangechecks.inc"
3185-
#undef GET_SME_IMMEDIATE_CHECK
31863226
}
31873227

31883228
return ParseSVEImmChecks(TheCall, ImmChecks);
@@ -3569,6 +3609,9 @@ bool Sema::CheckAArch64BuiltinFunctionCall(const TargetInfo &TI,
35693609
if (CheckSVEBuiltinFunctionCall(BuiltinID, TheCall))
35703610
return true;
35713611

3612+
if (CheckSMEBuiltinFunctionCall(BuiltinID, TheCall))
3613+
return true;
3614+
35723615
// For intrinsics which take an immediate value as part of the instruction,
35733616
// range check them here.
35743617
unsigned i = 0, l = 0, u = 0;

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
3131
// CHECK-CXX-NEXT: ret void
3232
//
33-
void test_svaddha_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) {
33+
void test_svaddha_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) __arm_streaming {
3434
SME_ACLE_FUNC(svaddha_za32, _u32, _m)(0, pn, pm, zn);
3535
}
3636

@@ -50,7 +50,7 @@ void test_svaddha_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) {
5050
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
5151
// CHECK-CXX-NEXT: ret void
5252
//
53-
void test_svaddha_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) {
53+
void test_svaddha_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) __arm_streaming {
5454
SME_ACLE_FUNC(svaddha_za32, _u32, _m)(3, pn, pm, zn);
5555
}
5656

@@ -70,7 +70,7 @@ void test_svaddha_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) {
7070
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
7171
// CHECK-CXX-NEXT: ret void
7272
//
73-
void test_svaddha_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) {
73+
void test_svaddha_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) __arm_streaming {
7474
SME_ACLE_FUNC(svaddha_za32, _s32, _m)(0, pn, pm, zn);
7575
}
7676

@@ -90,7 +90,7 @@ void test_svaddha_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) {
9090
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
9191
// CHECK-CXX-NEXT: ret void
9292
//
93-
void test_svaddha_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) {
93+
void test_svaddha_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) __arm_streaming {
9494
SME_ACLE_FUNC(svaddha_za32, _s32, _m)(3, pn, pm, zn);
9595
}
9696

@@ -110,7 +110,7 @@ void test_svaddha_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) {
110110
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
111111
// CHECK-CXX-NEXT: ret void
112112
//
113-
void test_svaddva_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) {
113+
void test_svaddva_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) __arm_streaming {
114114
SME_ACLE_FUNC(svaddva_za32, _u32, _m)(0, pn, pm, zn);
115115
}
116116

@@ -130,7 +130,7 @@ void test_svaddva_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) {
130130
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
131131
// CHECK-CXX-NEXT: ret void
132132
//
133-
void test_svaddva_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) {
133+
void test_svaddva_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) __arm_streaming {
134134
SME_ACLE_FUNC(svaddva_za32, _u32, _m)(3, pn, pm, zn);
135135
}
136136

@@ -150,7 +150,7 @@ void test_svaddva_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) {
150150
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
151151
// CHECK-CXX-NEXT: ret void
152152
//
153-
void test_svaddva_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) {
153+
void test_svaddva_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) __arm_streaming {
154154
SME_ACLE_FUNC(svaddva_za32, _s32, _m)(0, pn, pm, zn);
155155
}
156156

@@ -170,7 +170,7 @@ void test_svaddva_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) {
170170
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]])
171171
// CHECK-CXX-NEXT: ret void
172172
//
173-
void test_svaddva_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) {
173+
void test_svaddva_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) __arm_streaming {
174174
SME_ACLE_FUNC(svaddva_za32, _s32, _m)(3, pn, pm, zn);
175175
}
176176
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
3131
// CHECK-CXX-NEXT: ret void
3232
//
33-
void test_svaddha_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) {
33+
void test_svaddha_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) __arm_streaming {
3434
SME_ACLE_FUNC(svaddha_za64, _u64, _m)(0, pn, pm, zn);
3535
}
3636

@@ -50,7 +50,7 @@ void test_svaddha_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) {
5050
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
5151
// CHECK-CXX-NEXT: ret void
5252
//
53-
void test_svaddha_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) {
53+
void test_svaddha_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) __arm_streaming {
5454
SME_ACLE_FUNC(svaddha_za64, _u64, _m)(7, pn, pm, zn);
5555
}
5656

@@ -70,7 +70,7 @@ void test_svaddha_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) {
7070
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
7171
// CHECK-CXX-NEXT: ret void
7272
//
73-
void test_svaddha_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) {
73+
void test_svaddha_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) __arm_streaming {
7474
SME_ACLE_FUNC(svaddha_za64, _s64, _m)(0, pn, pm, zn);
7575
}
7676

@@ -90,7 +90,7 @@ void test_svaddha_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) {
9090
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
9191
// CHECK-CXX-NEXT: ret void
9292
//
93-
void test_svaddha_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) {
93+
void test_svaddha_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) __arm_streaming {
9494
SME_ACLE_FUNC(svaddha_za64, _s64, _m)(7, pn, pm, zn);
9595
}
9696

@@ -110,7 +110,7 @@ void test_svaddha_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) {
110110
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
111111
// CHECK-CXX-NEXT: ret void
112112
//
113-
void test_svaddva_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) {
113+
void test_svaddva_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) __arm_streaming {
114114
SME_ACLE_FUNC(svaddva_za64, _u64, _m)(0, pn, pm, zn);
115115
}
116116

@@ -130,7 +130,7 @@ void test_svaddva_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) {
130130
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
131131
// CHECK-CXX-NEXT: ret void
132132
//
133-
void test_svaddva_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) {
133+
void test_svaddva_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) __arm_streaming {
134134
SME_ACLE_FUNC(svaddva_za64, _u64, _m)(7, pn, pm, zn);
135135
}
136136

@@ -150,7 +150,7 @@ void test_svaddva_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) {
150150
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
151151
// CHECK-CXX-NEXT: ret void
152152
//
153-
void test_svaddva_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) {
153+
void test_svaddva_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) __arm_streaming {
154154
SME_ACLE_FUNC(svaddva_za64, _s64, _m)(0, pn, pm, zn);
155155
}
156156

@@ -170,7 +170,7 @@ void test_svaddva_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) {
170170
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]])
171171
// CHECK-CXX-NEXT: ret void
172172
//
173-
void test_svaddva_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) {
173+
void test_svaddva_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) __arm_streaming {
174174
SME_ACLE_FUNC(svaddva_za64, _s64, _m)(7, pn, pm, zn);
175175
}
176176
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
2727
// CHECK-CXX-NEXT: ret void
2828
//
29-
void test_svmopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svint8_t zm) {
29+
void test_svmopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svint8_t zm) __arm_streaming {
3030
SME_ACLE_FUNC(svmopa_za32, _s8, _m)(0, pn, pm, zn, zm);
3131
}
3232

@@ -42,7 +42,7 @@ void test_svmopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svint8_t zm) {
4242
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
4343
// CHECK-CXX-NEXT: ret void
4444
//
45-
void test_svmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svuint8_t zm) {
45+
void test_svmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svuint8_t zm) __arm_streaming {
4646
SME_ACLE_FUNC(svmopa_za32, _u8, _m)(0, pn, pm, zn, zm);
4747
}
4848

@@ -62,7 +62,7 @@ void test_svmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svuint8_t zm) {
6262
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8bf16(i32 0, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x bfloat> [[ZN]], <vscale x 8 x bfloat> [[ZM]])
6363
// CHECK-CXX-NEXT: ret void
6464
//
65-
void test_svmopa_za32_bf16(svbool_t pn, svbool_t pm, svbfloat16_t zn, svbfloat16_t zm) {
65+
void test_svmopa_za32_bf16(svbool_t pn, svbool_t pm, svbfloat16_t zn, svbfloat16_t zm) __arm_streaming {
6666
SME_ACLE_FUNC(svmopa_za32, _bf16, _m)(0, pn, pm, zn, zm);
6767
}
6868

@@ -82,7 +82,7 @@ void test_svmopa_za32_bf16(svbool_t pn, svbool_t pm, svbfloat16_t zn, svbfloat16
8282
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8f16(i32 1, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x half> [[ZN]], <vscale x 8 x half> [[ZM]])
8383
// CHECK-CXX-NEXT: ret void
8484
//
85-
void test_svmopa_za32_f16(svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t zm) {
85+
void test_svmopa_za32_f16(svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t zm) __arm_streaming {
8686
SME_ACLE_FUNC(svmopa_za32, _f16, _m)(1, pn, pm, zn, zm);
8787
}
8888

@@ -102,7 +102,7 @@ void test_svmopa_za32_f16(svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t
102102
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv4f32(i32 1, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x float> [[ZN]], <vscale x 4 x float> [[ZM]])
103103
// CHECK-CXX-NEXT: ret void
104104
//
105-
void test_svmopa_za32_f32(svbool_t pn, svbool_t pm, svfloat32_t zn, svfloat32_t zm) {
105+
void test_svmopa_za32_f32(svbool_t pn, svbool_t pm, svfloat32_t zn, svfloat32_t zm) __arm_streaming {
106106
SME_ACLE_FUNC(svmopa_za32, _f32, _m)(1, pn, pm, zn, zm);
107107
}
108108

@@ -118,7 +118,7 @@ void test_svmopa_za32_f32(svbool_t pn, svbool_t pm, svfloat32_t zn, svfloat32_t
118118
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
119119
// CHECK-CXX-NEXT: ret void
120120
//
121-
void test_svsumopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svuint8_t zm) {
121+
void test_svsumopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svuint8_t zm) __arm_streaming {
122122
SME_ACLE_FUNC(svsumopa_za32, _s8, _m)(0, pn, pm, zn, zm);
123123
}
124124

@@ -134,7 +134,7 @@ void test_svsumopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svuint8_t zm)
134134
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
135135
// CHECK-CXX-NEXT: ret void
136136
//
137-
void test_svusmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svint8_t zm) {
137+
void test_svusmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svint8_t zm) __arm_streaming {
138138
SME_ACLE_FUNC(svusmopa_za32, _u8, _m)(0, pn, pm, zn, zm);
139139
}
140140
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv8i16(i32 7, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]])
3131
// CHECK-CXX-NEXT: ret void
3232
//
33-
void test_svmopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svint16_t zm) {
33+
void test_svmopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svint16_t zm) __arm_streaming {
3434
SME_ACLE_FUNC(svmopa_za64, _s16, _m)(7, pn, pm, zn, zm);
3535
}
3636

@@ -50,7 +50,7 @@ void test_svmopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svint16_t zm)
5050
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv8i16(i32 0, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]])
5151
// CHECK-CXX-NEXT: ret void
5252
//
53-
void test_svmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svuint16_t zm) {
53+
void test_svmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svuint16_t zm) __arm_streaming {
5454
SME_ACLE_FUNC(svmopa_za64, _u16, _m)(0, pn, pm, zn, zm);
5555
}
5656

@@ -70,7 +70,7 @@ void test_svmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svuint16_t zm
7070
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv2f64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x double> [[ZN]], <vscale x 2 x double> [[ZM]])
7171
// CHECK-CXX-NEXT: ret void
7272
//
73-
void test_svmopa_za64_f64(svbool_t pn, svbool_t pm, svfloat64_t zn, svfloat64_t zm) {
73+
void test_svmopa_za64_f64(svbool_t pn, svbool_t pm, svfloat64_t zn, svfloat64_t zm) __arm_streaming {
7474
SME_ACLE_FUNC(svmopa_za64, _f64, _m)(7, pn, pm, zn, zm);
7575
}
7676

@@ -90,7 +90,7 @@ void test_svmopa_za64_f64(svbool_t pn, svbool_t pm, svfloat64_t zn, svfloat64_t
9090
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv8i16(i32 0, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]])
9191
// CHECK-CXX-NEXT: ret void
9292
//
93-
void test_svsumopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svuint16_t zm) {
93+
void test_svsumopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svuint16_t zm) __arm_streaming {
9494
SME_ACLE_FUNC(svsumopa_za64, _s16, _m)(0, pn, pm, zn, zm);
9595
}
9696

@@ -110,7 +110,7 @@ void test_svsumopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svuint16_t z
110110
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv8i16(i32 7, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x i16> [[ZN]], <vscale x 8 x i16> [[ZM]])
111111
// CHECK-CXX-NEXT: ret void
112112
//
113-
void test_svusmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svint16_t zm) {
113+
void test_svusmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svint16_t zm) __arm_streaming {
114114
SME_ACLE_FUNC(svusmopa_za64, _u16, _m)(7, pn, pm, zn, zm);
115115
}
116116
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:

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