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sjoerdmeijersjoerdmeijer
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[LoopInterchange] Remove "S" Scalar Dependencies
We are not handling 'S' scalar dependencies correctly and have at least the following miscompiles related to that: [LoopInterchange] incorrect handling of scalar dependencies and dependence vectors starting with ">" #54176 [LoopInterchange] Interchange breaks program correctness #46867 [LoopInterchange] Loops should not interchanged due to dependencies #47259 [LoopInterchange] Loops should not interchanged due to control flow #47401 This patch does no longer insert the "S" dependency/direction into the dependency matrix, so a dependency is never "S". We seem to have forgotten what the exact meaning is of this dependency type, and don't see why it should be treated differently. We prefer correctness over incorrect and more aggressive results. I.e., this prevents the miscompiles at the expense of handling less cases, i.e. making interchange more pessimistic. However, some of the cases that are now rejected for dependence analysis reasons, were rejected before too but for other reasons (e.g. profitability). So at least for the llvm regression tests, the number of regression are very reasonable. This should be a stopgap. We would like to get interchange enabled by default and thus prefer correctness over unsafe transforms, and later see if we can get solve the regressions.
1 parent 408659c commit 95395bb

13 files changed

+126
-220
lines changed

‎llvm/lib/Transforms/Scalar/LoopInterchange.cpp

Lines changed: 12 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -136,23 +136,18 @@ static bool populateDependencyMatrix(CharMatrix &DepMatrix, unsigned Level,
136136
unsigned Levels = D->getLevels();
137137
char Direction;
138138
for (unsigned II = 1; II <= Levels; ++II) {
139-
if (D->isScalar(II)) {
140-
Direction = 'S';
141-
Dep.push_back(Direction);
142-
} else {
143-
unsigned Dir = D->getDirection(II);
144-
if (Dir == Dependence::DVEntry::LT ||
145-
Dir == Dependence::DVEntry::LE)
146-
Direction = '<';
147-
else if (Dir == Dependence::DVEntry::GT ||
148-
Dir == Dependence::DVEntry::GE)
149-
Direction = '>';
150-
else if (Dir == Dependence::DVEntry::EQ)
151-
Direction = '=';
152-
else
153-
Direction = '*';
154-
Dep.push_back(Direction);
155-
}
139+
unsigned Dir = D->getDirection(II);
140+
if (Dir == Dependence::DVEntry::LT ||
141+
Dir == Dependence::DVEntry::LE)
142+
Direction = '<';
143+
else if (Dir == Dependence::DVEntry::GT ||
144+
Dir == Dependence::DVEntry::GE)
145+
Direction = '>';
146+
else if (Dir == Dependence::DVEntry::EQ)
147+
Direction = '=';
148+
else
149+
Direction = '*';
150+
Dep.push_back(Direction);
156151
}
157152
while (Dep.size() != Level) {
158153
Dep.push_back('I');

‎llvm/test/Transforms/LoopInterchange/gh54176-scalar-deps.ll

Lines changed: 12 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -29,19 +29,13 @@
2929
define dso_local i32 @test1(i1 %cond) {
3030
; CHECK-LABEL: define dso_local i32 @test1(
3131
; CHECK-SAME: i1 [[COND:%.*]]) {
32-
; CHECK-NEXT: [[FOR_PREHEADER:.*:]]
33-
; CHECK-NEXT: br label %[[INNERLOOP_PREHEADER:.*]]
34-
; CHECK: [[OUTERLOOP_PREHEADER:.*]]:
32+
; CHECK-NEXT: [[FOR_PREHEADER:.*]]:
3533
; CHECK-NEXT: br label %[[OUTERLOOP:.*]]
3634
; CHECK: [[OUTERLOOP]]:
37-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[INDVARS_IV_NEXT21_I:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[OUTERLOOP_PREHEADER]] ]
38-
; CHECK-NEXT: br label %[[INNERLOOP_SPLIT:.*]]
39-
; CHECK: [[INNERLOOP_PREHEADER]]:
35+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, %[[FOR_PREHEADER]] ], [ [[INDVARS_IV_NEXT21_I:%.*]], %[[FOR_LATCH:.*]] ]
4036
; CHECK-NEXT: br label %[[INNERLOOP:.*]]
4137
; CHECK: [[INNERLOOP]]:
42-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[TMP0:%.*]], %[[IF_END_SPLIT:.*]] ], [ 0, %[[INNERLOOP_PREHEADER]] ]
43-
; CHECK-NEXT: br label %[[OUTERLOOP_PREHEADER]]
44-
; CHECK: [[INNERLOOP_SPLIT]]:
38+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ 0, %[[OUTERLOOP]] ], [ [[TMP0:%.*]], %[[IF_END:.*]] ]
4539
; CHECK-NEXT: [[ARRAYIDX6_I:%.*]] = getelementptr inbounds [4 x [9 x i32]], ptr @f, i64 0, i64 [[J]], i64 [[I]]
4640
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[ARRAYIDX6_I]], align 4
4741
; CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp eq i32 [[I1]], 0
@@ -50,24 +44,20 @@ define dso_local i32 @test1(i1 %cond) {
5044
; CHECK-NEXT: store i32 3, ptr @g, align 4
5145
; CHECK-NEXT: br label %[[LAND_END]]
5246
; CHECK: [[LAND_END]]:
53-
; CHECK-NEXT: br i1 [[COND]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]
47+
; CHECK-NEXT: br i1 [[COND]], label %[[IF_END]], label %[[IF_THEN:.*]]
5448
; CHECK: [[IF_THEN]]:
5549
; CHECK-NEXT: [[I2:%.*]] = load i32, ptr @g, align 4
5650
; CHECK-NEXT: [[INC_I:%.*]] = add i32 [[I2]], 1
5751
; CHECK-NEXT: store i32 [[INC_I]], ptr @g, align 4
5852
; CHECK-NEXT: br label %[[IF_END]]
5953
; CHECK: [[IF_END]]:
60-
; CHECK-NEXT: [[J_NEXT:%.*]] = add nuw nsw i64 [[J]], 1
61-
; CHECK-NEXT: [[EXITCOND_I:%.*]] = icmp eq i64 [[J_NEXT]], 3
62-
; CHECK-NEXT: br label %[[FOR_LATCH]]
63-
; CHECK: [[IF_END_SPLIT]]:
6454
; CHECK-NEXT: [[TMP0]] = add nuw nsw i64 [[J]], 1
6555
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 3
66-
; CHECK-NEXT: br i1 [[TMP1]], label %[[EXIT:.*]], label %[[INNERLOOP]]
56+
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_LATCH]], label %[[INNERLOOP]]
6757
; CHECK: [[FOR_LATCH]]:
6858
; CHECK-NEXT: [[INDVARS_IV_NEXT21_I]] = add nsw i64 [[I]], 1
6959
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i64 [[I]], 2
70-
; CHECK-NEXT: br i1 [[CMP_I]], label %[[OUTERLOOP]], label %[[IF_END_SPLIT]]
60+
; CHECK-NEXT: br i1 [[CMP_I]], label %[[OUTERLOOP]], label %[[EXIT:.*]]
7161
; CHECK: [[EXIT]]:
7262
; CHECK-NEXT: [[I3:%.*]] = load i32, ptr @g, align 4
7363
; CHECK-NEXT: ret i32 [[I3]]
@@ -139,19 +129,13 @@ exit:
139129
define dso_local i32 @test2(i1 %cond) {
140130
; CHECK-LABEL: define dso_local i32 @test2(
141131
; CHECK-SAME: i1 [[COND:%.*]]) {
142-
; CHECK-NEXT: [[FOR_PREHEADER:.*:]]
143-
; CHECK-NEXT: br label %[[INNERLOOP_PREHEADER:.*]]
144-
; CHECK: [[OUTERLOOP_PREHEADER:.*]]:
132+
; CHECK-NEXT: [[FOR_PREHEADER:.*]]:
145133
; CHECK-NEXT: br label %[[OUTERLOOP:.*]]
146134
; CHECK: [[OUTERLOOP]]:
147-
; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[INDVARS_IV_NEXT21_I:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[OUTERLOOP_PREHEADER]] ]
148-
; CHECK-NEXT: br label %[[INNERLOOP_SPLIT:.*]]
149-
; CHECK: [[INNERLOOP_PREHEADER]]:
135+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, %[[FOR_PREHEADER]] ], [ [[INDVARS_IV_NEXT21_I:%.*]], %[[FOR_LATCH:.*]] ]
150136
; CHECK-NEXT: br label %[[INNERLOOP:.*]]
151137
; CHECK: [[INNERLOOP]]:
152-
; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[TMP0:%.*]], %[[IF_END_SPLIT:.*]] ], [ 0, %[[INNERLOOP_PREHEADER]] ]
153-
; CHECK-NEXT: br label %[[OUTERLOOP_PREHEADER]]
154-
; CHECK: [[INNERLOOP_SPLIT]]:
138+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ 0, %[[OUTERLOOP]] ], [ [[TMP0:%.*]], %[[IF_END:.*]] ]
155139
; CHECK-NEXT: [[ARRAYIDX6_I:%.*]] = getelementptr inbounds [4 x [9 x i32]], ptr @f, i64 0, i64 [[J]], i64 [[I]]
156140
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[ARRAYIDX6_I]], align 4
157141
; CHECK-NEXT: [[TOBOOL_I:%.*]] = icmp eq i32 [[I1]], 0
@@ -160,24 +144,20 @@ define dso_local i32 @test2(i1 %cond) {
160144
; CHECK: [[LAND_RHS]]:
161145
; CHECK-NEXT: br label %[[LAND_END]]
162146
; CHECK: [[LAND_END]]:
163-
; CHECK-NEXT: br i1 [[COND]], label %[[IF_END:.*]], label %[[IF_THEN:.*]]
147+
; CHECK-NEXT: br i1 [[COND]], label %[[IF_END]], label %[[IF_THEN:.*]]
164148
; CHECK: [[IF_THEN]]:
165149
; CHECK-NEXT: [[I2:%.*]] = load i32, ptr @g, align 4
166150
; CHECK-NEXT: [[INC_I:%.*]] = add i32 [[I2]], 1
167151
; CHECK-NEXT: store i32 [[INC_I]], ptr @g, align 4
168152
; CHECK-NEXT: br label %[[IF_END]]
169153
; CHECK: [[IF_END]]:
170-
; CHECK-NEXT: [[J_NEXT:%.*]] = add nuw nsw i64 [[J]], 1
171-
; CHECK-NEXT: [[EXITCOND_I:%.*]] = icmp eq i64 [[J_NEXT]], 3
172-
; CHECK-NEXT: br label %[[FOR_LATCH]]
173-
; CHECK: [[IF_END_SPLIT]]:
174154
; CHECK-NEXT: [[TMP0]] = add nuw nsw i64 [[J]], 1
175155
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 3
176-
; CHECK-NEXT: br i1 [[TMP1]], label %[[EXIT:.*]], label %[[INNERLOOP]]
156+
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_LATCH]], label %[[INNERLOOP]]
177157
; CHECK: [[FOR_LATCH]]:
178158
; CHECK-NEXT: [[INDVARS_IV_NEXT21_I]] = add nsw i64 [[I]], 1
179159
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i64 [[I]], 2
180-
; CHECK-NEXT: br i1 [[CMP_I]], label %[[OUTERLOOP]], label %[[IF_END_SPLIT]]
160+
; CHECK-NEXT: br i1 [[CMP_I]], label %[[OUTERLOOP]], label %[[EXIT:.*]]
181161
; CHECK: [[EXIT]]:
182162
; CHECK-NEXT: [[I3:%.*]] = load i32, ptr @g, align 4
183163
; CHECK-NEXT: ret i32 [[I3]]

‎llvm/test/Transforms/LoopInterchange/inner-only-reductions.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818

1919
; CHECK: --- !Missed
2020
; CHECK-NEXT: Pass: loop-interchange
21-
; CHECK-NEXT: Name: UnsupportedPHI
21+
; CHECK-NEXT: Name: Dependence
2222
; CHECK-NEXT: Function: reduction_01
2323

2424
; IR-LABEL: @reduction_01(
@@ -71,7 +71,7 @@ for.end8: ; preds = %for.cond1.for.inc6_
7171

7272
; CHECK: --- !Missed
7373
; CHECK-NEXT: Pass: loop-interchange
74-
; CHECK-NEXT: Name: UnsupportedPHIOuter
74+
; CHECK-NEXT: Name: Dependence
7575
; CHECK-NEXT: Function: reduction_03
7676

7777
; IR-LABEL: @reduction_03(

‎llvm/test/Transforms/LoopInterchange/innermost-latch-uses-values-in-middle-header.ll

Lines changed: 9 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -18,35 +18,28 @@ define void @innermost_latch_uses_values_in_middle_header() {
1818
; CHECK: [[OUTERMOST_HEADER]]:
1919
; CHECK-NEXT: [[INDVAR_OUTERMOST:%.*]] = phi i32 [ 10, %[[ENTRY]] ], [ [[INDVAR_OUTERMOST_NEXT:%.*]], %[[OUTERMOST_LATCH:.*]] ]
2020
; CHECK-NEXT: [[TOBOOL71_I:%.*]] = icmp eq i32 [[TMP0]], 0
21-
; CHECK-NEXT: br i1 [[TOBOOL71_I]], label %[[INNERMOST_HEADER_PREHEADER:.*]], label %[[OUTERMOST_LATCH]]
22-
; CHECK: [[MIDDLE_HEADER_PREHEADER:.*]]:
21+
; CHECK-NEXT: br i1 [[TOBOOL71_I]], label %[[MIDDLE_HEADER_PREHEADER:.*]], label %[[OUTERMOST_LATCH]]
22+
; CHECK: [[MIDDLE_HEADER_PREHEADER]]:
2323
; CHECK-NEXT: br label %[[MIDDLE_HEADER:.*]]
2424
; CHECK: [[MIDDLE_HEADER]]:
2525
; CHECK-NEXT: [[INDVAR_MIDDLE:%.*]] = phi i64 [ [[INDVAR_MIDDLE_NEXT:%.*]], %[[MIDDLE_LATCH:.*]] ], [ 4, %[[MIDDLE_HEADER_PREHEADER]] ]
2626
; CHECK-NEXT: [[INDVAR_MIDDLE_WIDE:%.*]] = zext i32 [[B]] to i64
27-
; CHECK-NEXT: br label %[[INNERMOST_BODY:.*]]
28-
; CHECK: [[INNERMOST_HEADER_PREHEADER]]:
2927
; CHECK-NEXT: br label %[[INNERMOST_HEADER:.*]]
3028
; CHECK: [[INNERMOST_HEADER]]:
31-
; CHECK-NEXT: [[INDVAR_INNERMOST:%.*]] = phi i64 [ [[TMP1:%.*]], %[[INNERMOST_LATCH_SPLIT:.*]] ], [ 4, %[[INNERMOST_HEADER_PREHEADER]] ]
32-
; CHECK-NEXT: br label %[[MIDDLE_HEADER_PREHEADER]]
29+
; CHECK-NEXT: [[INDVAR_INNERMOST:%.*]] = phi i64 [ [[TMP3:%.*]], %[[INNERMOST_LATCH:.*]] ], [ 4, %[[MIDDLE_HEADER]] ]
30+
; CHECK-NEXT: br label %[[INNERMOST_BODY:.*]]
3331
; CHECK: [[INNERMOST_BODY]]:
3432
; CHECK-NEXT: [[ARRAYIDX9_I:%.*]] = getelementptr inbounds [1 x [6 x i32]], ptr @d, i64 0, i64 [[INDVAR_INNERMOST]], i64 [[INDVAR_MIDDLE]]
3533
; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX9_I]], align 4
36-
; CHECK-NEXT: br label %[[INNERMOST_LATCH:.*]]
34+
; CHECK-NEXT: br label %[[INNERMOST_LATCH]]
3735
; CHECK: [[INNERMOST_LATCH]]:
38-
; CHECK-NEXT: [[INDVAR_INNERMOST_NEXT:%.*]] = add nsw i64 [[INDVAR_INNERMOST]], 1
39-
; CHECK-NEXT: [[TOBOOL5_I:%.*]] = icmp eq i64 [[INDVAR_INNERMOST_NEXT]], [[INDVAR_MIDDLE_WIDE]]
40-
; CHECK-NEXT: br label %[[MIDDLE_LATCH]]
41-
; CHECK: [[INNERMOST_LATCH_SPLIT]]:
42-
; CHECK-NEXT: [[INDVAR_MIDDLE_WIDE_LCSSA:%.*]] = phi i64 [ [[INDVAR_MIDDLE_WIDE]], %[[MIDDLE_LATCH]] ]
43-
; CHECK-NEXT: [[TMP1]] = add nsw i64 [[INDVAR_INNERMOST]], 1
44-
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], [[INDVAR_MIDDLE_WIDE_LCSSA]]
45-
; CHECK-NEXT: br i1 [[TMP2]], label %[[OUTERMOST_LATCH_LOOPEXIT:.*]], label %[[INNERMOST_HEADER]]
36+
; CHECK-NEXT: [[TMP3]] = add nsw i64 [[INDVAR_INNERMOST]], 1
37+
; CHECK-NEXT: [[TOBOOL5_I:%.*]] = icmp eq i64 [[TMP3]], [[INDVAR_MIDDLE_WIDE]]
38+
; CHECK-NEXT: br i1 [[TOBOOL5_I]], label %[[MIDDLE_LATCH]], label %[[INNERMOST_HEADER]]
4639
; CHECK: [[MIDDLE_LATCH]]:
4740
; CHECK-NEXT: [[INDVAR_MIDDLE_NEXT]] = add nsw i64 [[INDVAR_MIDDLE]], -1
4841
; CHECK-NEXT: [[TOBOOL2_I:%.*]] = icmp eq i64 [[INDVAR_MIDDLE_NEXT]], 0
49-
; CHECK-NEXT: br i1 [[TOBOOL2_I]], label %[[INNERMOST_LATCH_SPLIT]], label %[[MIDDLE_HEADER]]
42+
; CHECK-NEXT: br i1 [[TOBOOL2_I]], label %[[OUTERMOST_LATCH_LOOPEXIT:.*]], label %[[MIDDLE_HEADER]]
5043
; CHECK: [[OUTERMOST_LATCH_LOOPEXIT]]:
5144
; CHECK-NEXT: br label %[[OUTERMOST_LATCH]]
5245
; CHECK: [[OUTERMOST_LATCH]]:

‎llvm/test/Transforms/LoopInterchange/interchange-flow-dep-outer.ll

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -36,13 +36,9 @@ define void @interchange_09(i32 %k) {
3636
; CHECK-NEXT: [[CALL:%.*]] = call double @fn1()
3737
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x double], ptr @T, i64 0, i64 [[INDVARS_IV45]]
3838
; CHECK-NEXT: store double [[CALL]], ptr [[ARRAYIDX]], align 8
39-
; CHECK-NEXT: br label %[[FOR_BODY9_PREHEADER:.*]]
40-
; CHECK: [[FOR_COND6_PREHEADER_PREHEADER:.*]]:
4139
; CHECK-NEXT: br label %[[FOR_COND6_PREHEADER:.*]]
4240
; CHECK: [[FOR_COND6_PREHEADER]]:
43-
; CHECK-NEXT: [[INDVARS_IV42:%.*]] = phi i64 [ [[INDVARS_IV_NEXT43:%.*]], %[[FOR_COND_CLEANUP8:.*]] ], [ 0, %[[FOR_COND6_PREHEADER_PREHEADER]] ]
44-
; CHECK-NEXT: br label %[[FOR_BODY9_SPLIT1:.*]]
45-
; CHECK: [[FOR_BODY9_PREHEADER]]:
41+
; CHECK-NEXT: [[INDVARS_IV42:%.*]] = phi i64 [ 0, %[[FOR_BODY]] ], [ [[INDVARS_IV_NEXT43:%.*]], %[[FOR_COND_CLEANUP8:.*]] ]
4642
; CHECK-NEXT: br label %[[FOR_BODY9:.*]]
4743
; CHECK: [[FOR_COND_CLEANUP4]]:
4844
; CHECK-NEXT: [[TMP:%.*]] = load double, ptr [[ARRAYIDX]], align 8
@@ -53,23 +49,17 @@ define void @interchange_09(i32 %k) {
5349
; CHECK: [[FOR_COND_CLEANUP8]]:
5450
; CHECK-NEXT: [[INDVARS_IV_NEXT43]] = add nuw nsw i64 [[INDVARS_IV42]], 1
5551
; CHECK-NEXT: [[EXITCOND44:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT43]], 1000
56-
; CHECK-NEXT: br i1 [[EXITCOND44]], label %[[FOR_COND6_PREHEADER]], label %[[FOR_BODY9_SPLIT:.*]]
52+
; CHECK-NEXT: br i1 [[EXITCOND44]], label %[[FOR_COND6_PREHEADER]], label %[[FOR_COND_CLEANUP4]]
5753
; CHECK: [[FOR_BODY9]]:
58-
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP0:%.*]], %[[FOR_BODY9_SPLIT]] ], [ 1, %[[FOR_BODY9_PREHEADER]] ]
59-
; CHECK-NEXT: br label %[[FOR_COND6_PREHEADER_PREHEADER]]
60-
; CHECK: [[FOR_BODY9_SPLIT1]]:
54+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 1, %[[FOR_COND6_PREHEADER]] ], [ [[TMP0:%.*]], %[[FOR_BODY9]] ]
6155
; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [1000 x [1000 x i32]], ptr @Arr, i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV42]]
6256
; CHECK-NEXT: [[T1:%.*]] = load i32, ptr [[ARRAYIDX13]], align 4
6357
; CHECK-NEXT: [[T2:%.*]] = trunc i64 [[INDVARS_IV45]] to i32
6458
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[T1]], [[T2]]
6559
; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX13]], align 4
66-
; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
67-
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 1000
68-
; CHECK-NEXT: br label %[[FOR_COND_CLEANUP8]]
69-
; CHECK: [[FOR_BODY9_SPLIT]]:
7060
; CHECK-NEXT: [[TMP0]] = add nuw nsw i64 [[INDVARS_IV]], 1
7161
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[TMP0]], 1000
72-
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_BODY9]], label %[[FOR_COND_CLEANUP4]]
62+
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_BODY9]], label %[[FOR_COND_CLEANUP8]]
7363
;
7464
entry:
7565
br label %for.body

‎llvm/test/Transforms/LoopInterchange/lcssa.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ for.end16: ; preds = %for.exit
177177
}
178178

179179
; PHI node in inner latch with multiple predecessors.
180-
; REMARK: Interchanged
180+
; REMARK: Dependence
181181
; REMARK-NEXT: lcssa_05
182182

183183
define void @lcssa_05(ptr %ptr) {
@@ -222,7 +222,7 @@ for.end16: ; preds = %for.exit
222222
ret void
223223
}
224224

225-
; REMARK: UnsupportedExitPHI
225+
; REMARK: Dependence
226226
; REMARK-NEXT: lcssa_06
227227

228228
define void @lcssa_06(ptr %ptr, ptr %ptr1) {

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