Skip to content

Commit 97b3075

Browse files
committed
Addressed reviewed changes in renaming utility fn
1 parent 7901d5d commit 97b3075

File tree

1 file changed

+3
-3
lines changed

1 file changed

+3
-3
lines changed

llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -101,8 +101,8 @@ INITIALIZE_PASS_END(SILowerSGPRSpillsLegacy, DEBUG_TYPE,
101101

102102
char &llvm::SILowerSGPRSpillsLegacyID = SILowerSGPRSpillsLegacy::ID;
103103

104-
static bool isLiveInIntoMBB(MCRegister Reg, MachineBasicBlock &MBB,
105-
const TargetRegisterInfo *TRI) {
104+
static bool isLiveIntoMBB(MCRegister Reg, MachineBasicBlock &MBB,
105+
const TargetRegisterInfo *TRI) {
106106
for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R) {
107107
if (MBB.isLiveIn(*R)) {
108108
return true;
@@ -136,7 +136,7 @@ static void insertCSRSaves(MachineBasicBlock &SaveBlock,
136136
// incoming register value, so don't kill at the spill point. This happens
137137
// since we pass some special inputs (workgroup IDs) in the callee saved
138138
// range.
139-
bool IsLiveIn = isLiveInIntoMBB(Reg, SaveBlock, TRI);
139+
bool IsLiveIn = isLiveIntoMBB(Reg, SaveBlock, TRI);
140140
TII.storeRegToStackSlot(SaveBlock, I, Reg, !IsLiveIn, CS.getFrameIdx(),
141141
RC, TRI, Register());
142142

0 commit comments

Comments
 (0)