Skip to content

Commit 98b114d

Browse files
authored
[InstCombine] Retain exact instruction name for some cases in SimplifyDemandedUseBits. (#68371)
Retain name for SExt->ZExt and AShr->LShr. Previously SExt->ZExt copied the name with a numeric suffix. AShr->LShr dropped it.
1 parent c91d3b0 commit 98b114d

File tree

1 file changed

+3
-1
lines changed

1 file changed

+3
-1
lines changed

llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

+3-1
Original file line numberDiff line numberDiff line change
@@ -461,7 +461,8 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
461461
if (InputKnown.isNonNegative() ||
462462
DemandedMask.getActiveBits() <= SrcBitWidth) {
463463
// Convert to ZExt cast.
464-
CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy, I->getName());
464+
CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy);
465+
NewCast->takeName(I);
465466
return InsertNewInstWith(NewCast, I->getIterator());
466467
}
467468

@@ -770,6 +771,7 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
770771
BinaryOperator *LShr = BinaryOperator::CreateLShr(I->getOperand(0),
771772
I->getOperand(1));
772773
LShr->setIsExact(cast<BinaryOperator>(I)->isExact());
774+
LShr->takeName(I);
773775
return InsertNewInstWith(LShr, I->getIterator());
774776
} else if (Known.One[BitWidth-ShiftAmt-1]) { // New bits are known one.
775777
Known.One |= HighBits;

0 commit comments

Comments
 (0)